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[103.229.18.19]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-2e300b851b9sm5152715ad.78.2026.09.30.22.24.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 22:24:42 -0700 (PDT) From: Mayuresh Chitale To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Greg KH , Alexander Shishkin , Ian Rogers Cc: Anup Patel , Alexandre Ghiti , Peter Zijlstra , Ingo Molnar , Namhyung Kim , Mark Rutland , Jiri Olsa , Adrian Hunter , Mayuresh Chitale , Anup Patel , Atish Patra , Andrew Jones , Sunil V L , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Zane Leung Subject: [PATCH v6 10/14] riscv: Enable DMA_RESTRICTED_POOL in defconfig Date: Thu, 1 Oct 2026 10:52:21 +0530 Message-ID: <20261001052243.3042627-11-mayuresh.chitale@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261001052243.3042627-1-mayuresh.chitale@oss.qualcomm.com> References: <20261001052243.3042627-1-mayuresh.chitale@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: -yuIDP0Qdj4llG33FxbxxvE4Qyjd0OfA X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDAxMDAyMSBTYWx0ZWRfX/Iq/7IdAX68r KHW4KekN2eBZPzVXHn2hAs0peoDTFrAkBXlRZMZjNaPKKEE0Eypvxr/8fx13yqqxNQDwvYE/DNA /MT+NizhpnZem190lbZKgxcFhiq8TbIaIyQ5RG15zCCGXkt5IDpynrEaLYgt0gXTiVP+JbzWp0E qMrhZ3qnAxauoiXWwZQyYaAR2GAqRwNg3maVDdO9cwbsEp9MButJKbbQUlYhjDxr4AfKcuxPSTp WAcKfBDDp5Ca6FDc5PG2KAGokZgDL900ZBkjGye2fDMdFO7Z9ch7xQIulvj+8rqS43+DeQSr7yg qxIKgYadpINwbDBinpns9FENMja7+wABFqkRG6CNOBFfs+Z0KB2bov8uUdQlu0h8GMd3eE3IOKA lQJ+yz7Jm33ETfFzyNPMr3B8RGXTKY781yXQ+u2TNssXbgfOWbtRdEgZ/ME8JtAWKsXItdlA5wB UVY+pnZRudhL6a72spw== X-Authority-Analysis: v=2.4 cv=MZn5KJ/f c=1 sm=1 tr=0 ts=6abdee9c cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=GbvFXuxacV0FzgsEJgAA:9 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDAxMDAyMSBTYWx0ZWRfX8sCiZHGwfl75 UGEjPCfMqBvl5ZAnVIHlLJGY/V+xTJ0oO2KsT6MbC0VOEMkaG3rOq9I99KiMfisuY2QUOHfnt+X g1qljoQxYWaC05fk3SxprKLa3HrdrC4= X-Proofpoint-ORIG-GUID: -yuIDP0Qdj4llG33FxbxxvE4Qyjd0OfA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-01_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610010021 From: Anup Patel The RISC-V ramsink trace component may have implementation specific restrictions such that the component can only write trace data in particular parts of DRAM. Enable DMA_RESTRICTED_POOL in the defconfig so that dma_alloc_*() and dma_free_*() APIs work for devices with DMA address restrictions. Signed-off-by: Anup Patel --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 04ae305d5511..7319421dcf7c 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -306,6 +306,7 @@ CONFIG_SECURITY_APPARMOR=y CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_DEV_VIRTIO=y +CONFIG_DMA_RESTRICTED_POOL=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_FS=y -- 2.43.0