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From: sashiko-bot@kernel.org
To: "Chi-Wen Weng" <cwweng.linux@gmail.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 2/3] spi: ma35d1: Add Nuvoton MA35D1 SPI controller support
Date: Thu, 01 Oct 2026 13:37:05 +0000	[thread overview]
Message-ID: <20261001133705.7C5A71F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20261001131818.110028-3-cwweng.linux@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] spi: ma35d1: probe fails on valid DT with num-cs > 2 when using GPIO CS
--

commit 297501e7117bfad68b786ba4098b2489480c1405
Author: Chi-Wen Weng <cwweng@nuvoton.com>

spi: ma35d1: Add Nuvoton MA35D1 SPI controller support

This commit adds a new driver for the SPI controller found in the Nuvoton
MA35D1 SoC. The driver supports SPI host mode using polling-based PIO
transfers, standard SPI modes, and natively controls up to two chip selects.

> diff --git a/drivers/spi/spi-ma35d1.c b/drivers/spi/spi-ma35d1.c
> new file mode 100644
> index 0000000000000..7560cb7e0b099
> --- /dev/null
> +++ b/drivers/spi/spi-ma35d1.c
[ ... ]
> +static int nuvoton_spi_probe(struct platform_device *pdev)
> +{
[ ... ]
> +	ret = device_property_read_u32(dev, "num-cs", &num_cs);
> +	if (ret && ret != -EINVAL)
> +		return dev_err_probe(dev, ret, "failed to read num-cs\n");
> +
> +	if (!num_cs || num_cs > NUVOTON_SPI_MAX_NATIVE_CS)
> +		return dev_err_probe(dev, -EINVAL, "invalid num-cs %u\n",
> +				     num_cs);

[Severity: Medium]
Will this check inadvertently reject valid device tree configurations that use
GPIO chip selects for additional devices?

The SPI core correctly supports expanding the total number of chip selects
beyond the native hardware limit when using GPIO descriptors. Since this
driver sets ctlr->use_gpio_descriptors to true, a device tree could specify a
num-cs value greater than NUVOTON_SPI_MAX_NATIVE_CS (which is 2) in order to
attach a 3rd or 4th SPI target using GPIOs.

Because nuvoton_spi_probe() checks the total num-cs read from the device
tree directly against NUVOTON_SPI_MAX_NATIVE_CS and returns -EINVAL, could
this artificially limit the bus to 2 devices overall and prevent GPIO chip
select expansion?

> +
> +	ctlr->num_chipselect = num_cs;
> +	ctlr->max_native_cs = NUVOTON_SPI_MAX_NATIVE_CS;
> +	ctlr->use_gpio_descriptors = true;
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261001131818.110028-1-cwweng.linux@gmail.com?part=2

  reply	other threads:[~2026-10-01 13:37 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-01 13:18 [PATCH v2 0/3] spi: Add Nuvoton MA35D1 SPI controller support Chi-Wen Weng
2026-10-01 13:18 ` [PATCH v2 1/3] spi: dt-bindings: nuvoton,ma35d1-qspi: Add MA35D1 SPI controller Chi-Wen Weng
2026-10-03 14:25   ` Krzysztof Kozlowski
2026-10-05  3:08     ` Chi-Wen Weng
2026-10-01 13:18 ` [PATCH v2 2/3] spi: ma35d1: Add Nuvoton MA35D1 SPI controller support Chi-Wen Weng
2026-10-01 13:37   ` sashiko-bot [this message]
2026-10-02  0:45     ` Chi-Wen Weng
2026-10-01 13:18 ` [PATCH v2 3/3] spi: ma35d1-qspi: Add GPIO chip select support Chi-Wen Weng
2026-10-01 13:46   ` sashiko-bot
2026-10-02  0:51     ` Chi-Wen Weng
2026-10-04 17:19 ` [PATCH v2 0/3] spi: Add Nuvoton MA35D1 SPI controller support Mark Brown

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