[PATCH v2 0/2] arm64: dts: socfpga: agilex: add SoCDK multi-QSPI board

[genevieve.chan@altera.com]

From: Genevieve Chan <genevieve.chan@altera.com>

The Agilex SoCDK is populated with a single QSPI flash by default. A
multi-QSPI daughter board can be fitted in its place. That board connects
four Micron MT25QU02G devices (256 MiB each, 1 GiB total) to the HPS
QSPI controller on chip selects 0-3. Each device is one "Boot and fpga
data" partition covering the whole flash, and is described in quad mode
at 25 MHz.

This is a board-level population difference, in the same way the
existing SoCDK eMMC and NAND variants differ from the default SoCDK.
The HPS is the Agilex SoC, later marketed as Agilex 7 F-Series. The
programming model is unchanged, so the board falls back to
"intel,socfpga-agilex" and does not add an F-Series SoC compatible.
Agilex 7 M-Series is a different device and already has its own
fallback.

Patch 1 documents that compatible next to the other Agilex SoCDK
boards. Patch 2 adds socfpga_agilex_socdk_multiqspi.dts. UART,
Ethernet, USB, SDMMC, LEDs and the watchdog match the SoCDK; the QSPI
node is the difference.

Changes in v2:
- Rename the compatible, DTS filename and model, dropping "agilex7f".
- State in the binding patch why the fallback is "intel,socfpga-agilex".
- Describe the daughter card instead of restating the diff.

Genevieve Chan (2):
  dt-bindings: arm: altera: add Agilex SoCDK multi-QSPI board
  arm64: dts: socfpga: agilex: add Agilex SoCDK multi-QSPI board

 Documentation/devicetree/bindings/arm/altera.yaml  |   1 +
 arch/arm64/boot/dts/intel/Makefile                 |   1 +
 .../dts/intel/socfpga_agilex_socdk_multiqspi.dts   | 213 +++++++++++++++++++++
 3 files changed, 215 insertions(+)

base-commit: 04a1d21330501b113ba04efb81724f1c95ad2db8
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2.43.7