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Wed, 07 Oct 2026 00:26:59 -0700 (PDT) From: Tomer Maimon To: andrew@codeconstruct.com.au, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, avifishman70@gmail.com, tmaimon77@gmail.com, tali.perry1@gmail.com, venture@google.com, yuenn@google.com, benjaminfair@google.com Subject: [PATCH RESEND v10 4/6] arm64: dts: nuvoton: npcm845: Add peripheral nodes Date: Wed, 7 Oct 2026 10:26:43 +0300 Message-Id: <20261007072645.1618147-5-tmaimon77@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261007072645.1618147-1-tmaimon77@gmail.com> References: <20261007072645.1618147-1-tmaimon77@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Extend the NPCM845 SoC DTSI with the peripheral controller nodes needed by the evaluation board and downstream platforms. Add the Ethernet MACs, USB device controllers and PHY, MMC controller, FIU controllers, memory controller, RNG, ADC, PWM/FAN controller, PSPI, and I2C buses. Also add the OP-TEE firmware node needed to describe these blocks. Signed-off-by: Tomer Maimon --- .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 686 ++++++++++++++++++ .../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 6 + 2 files changed, 692 insertions(+) diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi index 542f27e..9b7a99a 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { #address-cells = <2>; @@ -30,6 +31,11 @@ }; }; + udc0_phy: usb-phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + ahb { #address-cells = <2>; #size-cells = <2>; @@ -51,6 +57,252 @@ reg = <0x0 0xf0800000 0x0 0x1000>; }; + gmac1: ethernet@f0804000 { + device_type = "network"; + compatible = "snps,dwmac-3.72a", "snps,dwmac"; + reg = <0x0 0xf0804000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&rg2_pins + &rg2mdio_pins>; + status = "disabled"; + }; + + gmac2: ethernet@f0806000 { + device_type = "network"; + compatible = "snps,dwmac-3.72a", "snps,dwmac"; + reg = <0x0 0xf0806000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&r1_pins + &r1err_pins + &r1md_pins>; + status = "disabled"; + }; + + gmac3: ethernet@f0808000 { + device_type = "network"; + compatible = "snps,dwmac-3.72a", "snps,dwmac"; + reg = <0x0 0xf0808000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&r2_pins + &r2err_pins + &r2md_pins>; + status = "disabled"; + }; + + mc: memory-controller@f0824000 { + compatible = "nuvoton,npcm845-memory-controller"; + reg = <0x0 0xf0824000 0x0 0x1000>; + interrupts = ; + }; + + udc0: usb@f0830000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0830000 0x0 0x1000 + 0x0 0xfffeb000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc1: usb@f0831000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0831000 0x0 0x1000 + 0x0 0xfffeb800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc2: usb@f0832000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0832000 0x0 0x1000 + 0x0 0xfffec000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc3: usb@f0833000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0833000 0x0 0x1000 + 0x0 0xfffec800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc4: usb@f0834000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0834000 0x0 0x1000 + 0x0 0xfffed000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc5: usb@f0835000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0835000 0x0 0x1000 + 0x0 0xfffed800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc6: usb@f0836000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0836000 0x0 0x1000 + 0x0 0xfffee000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc7: usb@f0837000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0837000 0x0 0x1000 + 0x0 0xfffee800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc8: usb@f0838000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0838000 0x0 0x1000 + 0x0 0xfffef000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc9: usb@f0839000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0839000 0x0 0x1000 + 0x0 0xfffef800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + sdhci: mmc@f0842000 { + compatible = "nuvoton,npcm845-sdhci"; + reg = <0x0 0xf0842000 0x0 0x100>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_AHB>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc8_pins + &mmc_pins>; + status = "disabled"; + }; + + fiu0: spi@fb000000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xfb000000 0x0 0x1000>; + reg-names = "control"; + clocks = <&clk NPCM8XX_CLK_SPI0>; + status = "disabled"; + }; + + fiu1: spi@fb002000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xfb002000 0x0 0x1000>; + reg-names = "control"; + clocks = <&clk NPCM8XX_CLK_SPI1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "disabled"; + }; + + fiu3: spi@c0000000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xc0000000 0x0 0x1000>; + reg-names = "control"; + clocks = <&clk NPCM8XX_CLK_SPI3>; + pinctrl-names = "default"; + pinctrl-0 = <&spi3_pins>; + status = "disabled"; + }; + + fiux: spi@fb001000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xfb001000 0x0 0x1000>, + <0x0 0xf8000000 0x0 0x2000000>; + reg-names = "control", "memory"; + clocks = <&clk NPCM8XX_CLK_SPIX>; + status = "disabled"; + }; + apb@f0000000 { #address-cells = <1>; #size-cells = <1>; @@ -152,6 +404,245 @@ clocks = <&refclk>; }; + rng: rng@b000 { + compatible = "nuvoton,npcm845-rng"; + reg = <0xb000 0x8>; + status = "disabled"; + }; + + adc: adc@c000 { + compatible = "nuvoton,npcm845-adc"; + reg = <0xC000 0x8>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_ADC>; + resets = <&rstc 0x20 27>; + status = "disabled"; + }; + + i2c0: i2c@80000 { + reg = <0x80000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb0_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c1: i2c@81000 { + reg = <0x81000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb1_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c2: i2c@82000 { + reg = <0x82000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb2_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c3: i2c@83000 { + reg = <0x83000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb3_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c4: i2c@84000 { + reg = <0x84000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb4_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c5: i2c@85000 { + reg = <0x85000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb5_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c6: i2c@86000 { + reg = <0x86000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb6_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c7: i2c@87000 { + reg = <0x87000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb7_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c8: i2c@88000 { + reg = <0x88000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb8_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c9: i2c@89000 { + reg = <0x89000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb9_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c10: i2c@8a000 { + reg = <0x8a000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb10_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c11: i2c@8b000 { + reg = <0x8b000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb11_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c12: i2c@8c000 { + reg = <0x8c000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb12_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c13: i2c@8d000 { + reg = <0x8d000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb13_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c14: i2c@8e000 { + reg = <0x8e000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb14_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c15: i2c@8f000 { + reg = <0x8f000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb15_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + peci: peci-controller@100000 { compatible = "nuvoton,npcm845-peci"; reg = <0x100000 0x1000>; @@ -161,6 +652,53 @@ status = "disabled"; }; + pwm_fan:pwm-fan-controller@103000 { + compatible = "nuvoton,npcm845-pwm-fan"; + reg = <0x103000 0x3000>, + <0x180000 0x8000>; + reg-names = "pwm", "fan"; + clocks = <&clk NPCM8XX_CLK_APB3>, + <&clk NPCM8XX_CLK_APB4>; + clock-names = "pwm","fan"; + interrupts = , + , + , + , + , + , + , + ; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins &pwm1_pins + &pwm2_pins &pwm3_pins + &pwm4_pins &pwm5_pins + &pwm6_pins &pwm7_pins + &pwm8_pins &pwm9_pins + &pwm10_pins &pwm11_pins + &fanin0_pins &fanin1_pins + &fanin2_pins &fanin3_pins + &fanin4_pins &fanin5_pins + &fanin6_pins &fanin7_pins + &fanin8_pins &fanin9_pins + &fanin10_pins &fanin11_pins + &fanin12_pins &fanin13_pins + &fanin14_pins &fanin15_pins>; + status = "disabled"; + }; + + pspi: spi@201000 { + compatible = "nuvoton,npcm845-pspi"; + reg = <0x201000 0x1000>; + pinctrl-names = "default"; + pinctrl-0 = <&pspi_pins>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_APB5>; + clock-names = "clk_apb5"; + resets = <&rstc 0x24 23>; + status = "disabled"; + }; }; apb@fff00000 { @@ -169,6 +707,154 @@ compatible = "simple-bus"; interrupt-parent = <&gic>; ranges = <0xfff00000 0x0 0xfff00000 0x00016000>; + + i2c16: i2c@0 { + reg = <0x0 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb16_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c17: i2c@1000 { + reg = <0x1000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb17_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c18: i2c@2000 { + reg = <0x2000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb18_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c19: i2c@3000 { + reg = <0x3000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb19_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c20: i2c@4000 { + reg = <0x4000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb20_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c21: i2c@5000 { + reg = <0x5000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb21_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c22: i2c@6000 { + reg = <0x6000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb22_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c23: i2c@7000 { + reg = <0x7000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb23_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c24: i2c@8000 { + reg = <0x8000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c25: i2c@9000 { + reg = <0x9000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c26: i2c@a000 { + reg = <0xa000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; }; }; diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi index dc5a0e1..0be38b0 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi @@ -76,4 +76,10 @@ ; }; + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; -- 2.34.1