From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C63BE4A012F; Thu, 8 Oct 2026 13:19:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791465601; cv=none; b=irOzV/qg8Cc4xT28kU3haXOGNLhK8WywhL+JFAQyU0cHV6anftBL8Icbp6ptCrL+J2Rzn8zsV+CPMYN8BshuVWOY6ymNvDiFNTFBV9EsVg4pW78i6LGyOLuTdAHxNVCaxfLW12qH0YEnvVvfxn4sIGVK/ySnaHkekilqS4sJOhY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791465601; c=relaxed/simple; bh=+u2grcbCdhxCd975l0htRzcuvftDxE2QAvyE3v3OQ9Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=mUp7QxfgbS8BR8nYq6O0eMG8LuT9NxXwqfcIPPXiNVUn2SUvkbJPmkA7e+hTck/uCW1/s9z8maa5B2K2UUGZNZ2HQ8DyBC2N83StSCQvb6x+1A4hY9opIeci7GJEtqenO1ddJwz6W4gvgRctDL7ABKED9fgmM8GxnfGNDO36eMg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=u+b7roC3; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="u+b7roC3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1791465599; x=1823001599; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=+u2grcbCdhxCd975l0htRzcuvftDxE2QAvyE3v3OQ9Y=; b=u+b7roC39+gJzxR1uPHHXttbloXnkYaavhBC4FzEMwz3PCb+VZSuduoO iJF5Ey4/53b+8Ew+zlfC9bvUbxN2qRH8CN6mm0cyrPWghD7fd2fEp12EU dY+R5WUuIgS3r1CaNC1IHGPv+gbPbQ2v1ERyYSCDemQQo3YR2uK3Jxh3f b8Ngp+x9zW1ls9fWtaQJl+pDyr4IFoPPpETYrb7ZD4qMrvOlgxVKnHkmR 6/GAbmnzfCUNcN7JOrmv/LldqJ5UgLJMC1iWPD1nbwVU5a9rdMsqdoWh1 ldy9rRtSl40xC9BfM7JBGZ48Ig6qD/JXRKPhye3dQHkgwEdMjXefctLdG A==; X-CSE-ConnectionGUID: L6K/bHZ6TFaHAjy0vIlGwA== X-CSE-MsgGUID: UGxlOntCQYisPTRiN9YAqA== X-IronPort-AV: E=Sophos;i="6.27,146,1787036400"; d="scan'208";a="65038497" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Oct 2026 06:19:59 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Thu, 8 Oct 2026 06:19:38 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 8 Oct 2026 06:19:34 -0700 From: Cyrille Pitchen Date: Thu, 8 Oct 2026 15:19:03 +0200 Subject: [PATCH v10 3/5] ARM: dts: microchip: sam9x60: Add GFX2D GPU Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20261008-cpitchen-mainline_gfx2d-v10-3-67ca2477b3d5@microchip.com> References: <20261008-cpitchen-mainline_gfx2d-v10-0-67ca2477b3d5@microchip.com> In-Reply-To: <20261008-cpitchen-mainline_gfx2d-v10-0-67ca2477b3d5@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen , Manikandan Muralidharan X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=993; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=+u2grcbCdhxCd975l0htRzcuvftDxE2QAvyE3v3OQ9Y=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ9bxGaFzTv35OaNl3weNoxJKm7n8+x7ItC48OTWg5McDs VN2dbeLO0pZGMS4GGTFFFkOvdnam3n81WO7V6JSMHNYmUCGMHBxCsBE3FUZ/qdKnMly+1gZyLiH ySIj8D6Df8WJpxkHFj/ccuvVp5LTU1kZ/kdcuXeem+fOvruLr/MWTrq/suH/pml855a8Ynj4WPt iwyR2AA== X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D Add support for the GFX2D GPU. Reviewed-by: Manikandan Muralidharan Reviewed-by: Claudiu Beznea Signed-off-by: Cyrille Pitchen --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index e708b3df4ccd..1155f4f997f8 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -351,6 +351,14 @@ AT91_XDMAC_DT_PERID(26))>, status = "disabled"; }; + gpu: gpu@f0018000 { + compatible = "microchip,sam9x60-gfx2d"; + reg = <0xf0018000 0x100>; + interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; + status = "disabled"; + }; + i2s: i2s@f001c000 { compatible = "microchip,sam9x60-i2smcc"; reg = <0xf001c000 0x100>; -- 2.53.0