From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4032548E0DF; Thu, 8 Oct 2026 13:19:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791465586; cv=none; b=elfXlIxWAbgJ1brZGBljjpgg2KZ07fzscQFO/vpH5+jO89Yl7QusIFxL0WyYmLSTi8C/w3FHGri+CF/p6Uc/RrKTtn/fyDa9InrQD9bZG0mjeLsLGEQGeI9p7DMp2NDj6ujZ8KoP1wb4zXgxlypGjwA+vPMy/8AyqMsE4WoRaso= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791465586; c=relaxed/simple; bh=90E4Y3iv3wZWZ7rk6RLZc9iA+z4ETFdFADS8b0uLgEQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=fIVNQ8848j+367+TxofCh2on8mMLRXYMLdmvQW5KpRZlcuaET0DtmYPp1876geDFeb+JGxIyiWKfGRmYb4I7V89TTGLjAukwXCPJtbr9hBj+CN8ih08oa7BhuJawjpF2VFCOjT1QIeG4hkRP40LXOLpvEWT5hGhTfHxCChHjrCU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=F3YTr9fP; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="F3YTr9fP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1791465585; x=1823001585; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=90E4Y3iv3wZWZ7rk6RLZc9iA+z4ETFdFADS8b0uLgEQ=; b=F3YTr9fP/6LpY7UcSt5SpUZnZnMgGGPLGbmSwYXQtaSTBjWJv+YRt+A2 96PgxZ+tmCww5RQYRMmAVBauUwjzuA8x+rHglyeyinN2zB6GClpu+i+K5 yYh5/j/LwbgzeedD7lQjr9CwnbDHTn/lQ/373wTnMtFWR5zrsD3RGKYod 4rXAMPH0cP1LlPB1/2wqek8U8lzgWbkgTSJjsVt2gX40lu/DQRae5067X nciPG6wmuwCDQnqm1OchwA3GiV8vRJ9AkoIY8mIuJW3NSX3sUSV+OMexA dEXAmYHCm7vs2LyIdxoc823XkJtkFXvX/Y9tM5eLw2At6OIrocz71Xat7 w==; X-CSE-ConnectionGUID: +622eI16QE6ee81ArI64fQ== X-CSE-MsgGUID: Z8DGjZI9Tiuopdsb1Eu7hg== X-IronPort-AV: E=Sophos;i="6.27,146,1787036400"; d="scan'208";a="296168800" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2026 06:19:44 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.49; Thu, 8 Oct 2026 06:19:42 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 8 Oct 2026 06:19:38 -0700 From: Cyrille Pitchen Date: Thu, 8 Oct 2026 15:19:04 +0200 Subject: [PATCH v10 4/5] ARM: dts: microchip: sam9x7: Add GFX2D GPU Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20261008-cpitchen-mainline_gfx2d-v10-4-67ca2477b3d5@microchip.com> References: <20261008-cpitchen-mainline_gfx2d-v10-0-67ca2477b3d5@microchip.com> In-Reply-To: <20261008-cpitchen-mainline_gfx2d-v10-0-67ca2477b3d5@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen , Manikandan Muralidharan X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1002; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=90E4Y3iv3wZWZ7rk6RLZc9iA+z4ETFdFADS8b0uLgEQ=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ9bxGWF87UrsfKl/4/o/9xre2D9vxradgs5v77M8vmj68 Z7R/NKqjlIWBjEuBlkxRZZDb7b2Zh5/9djulagUzBxWJpAhDFycAjCRGwsZ/ikYl/9gYBN/vsPh 2gKjZ102v1x3TfSRvP5qz9ub8+dZSScz/NO+soxdceGOufzHzXkUDbMq/v4UVpt0eav6IseThbL C71kA X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D Add support for the GFX2D GPU. Reviewed-by: Manikandan Muralidharan Reviewed-by: Claudiu Beznea Signed-off-by: Cyrille Pitchen --- arch/arm/boot/dts/microchip/sam9x7.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi index c680a5033b6b..5450fddf89dd 100644 --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi @@ -292,6 +292,14 @@ AT91_XDMAC_DT_PERID(26))>, status = "disabled"; }; + gpu: gpu@f0018000 { + compatible = "microchip,sam9x7-gfx2d"; + reg = <0xf0018000 0x100>; + interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; + status = "disabled"; + }; + i2s: i2s@f001c000 { compatible = "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc"; reg = <0xf001c000 0x100>; -- 2.53.0