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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-16166121f2asm14522277c88.4.2026.10.08.01.10.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2026 01:10:51 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Taniya Das , Jagadeesh Kona , Bryan O'Donoghue , Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH v2 0/4] qcom: videocc: Fix sleep clock on Glymur/SM8750/Nord Date: Thu, 8 Oct 2026 16:10:32 +0800 Message-ID: <20261008081036.3492003-1-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: rEwgFQjw5MUK9ihw-ezl7lzPHOcelnuM X-Authority-Analysis: v=2.4 cv=E4dYNqdl c=1 sm=1 tr=0 ts=6ac7500d cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=tnQB6NTvr8Q-iuunBwcA:9 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA4MDAzMiBTYWx0ZWRfX1OiMtTcWu3Pt WnjQy9mEdOljSUj++4GT4Wd523bUWtsLJWSrE4qHr/3qpxPCD9ZKg/ZLEHaZNzX80mY5oYY849g 2K301mkDvGzeZHcpfD5M3c3iZYIDlPU= X-Proofpoint-GUID: rEwgFQjw5MUK9ihw-ezl7lzPHOcelnuM X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA4MDAzMiBTYWx0ZWRfXwCD5Hmtw0HF9 Uf+grFoxgtwbeygQgB9cB5nnmt6FxA1sf022kYcJkIJ0rQfMK+kqO99jCq6muB2lFbWRdt5Ng3B gajivrqKe70prOy7ZJ4nreI1zO3vcnQL2ynA8O1auupiOQK0Bv/uzpP5vf8oPd9r7nd/GnPcuGA /p7PUXs5D4bpOPRuMjaTY+Qd7Rv+J5QWUbcSO3PQfDEZQifuBQNEeRScdnQEipHx9UPfi4Vdi3q nMZS+rjWibqwJob+pCC86JjMoJaEQ/8IDWrTqf5yaPMjJq+LVHkjQPNrZRpvilyAFzIBGHV3+86 sswbVP7iArEKFo3SNJ3DfRAa805QMMQKq/B9ueLkJglJMUSBRz3BMCsqkHrHSNrtXki1Es3xGOj QUrjFxUb7pNs/LBawhD92dcTsz6g4bQlPj12qZN3AlacjVIwIjfheTnssFhRf86fbFsLo2q1/7U Vozn5Rd2WQDHPi0tytA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-08_03,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 phishscore=0 spamscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610020000 definitions=main-2610080032 The video clock controller on Glymur, SM8750 and Nord has three clock inputs: the board XO, the always-on board XO that feeds its PLL reference, and the 32 kHz chip sleep clock that sources its sleep clock generator. It has no AHB clock input; the AHB clock the controller uses for itself is generated inside the block from the XO input. qcom,sm8450-videocc.yaml describes two inputs for every compatible it covers, a board XO and a video AHB clock from GCC. For these three SoCs that leaves the sleep clock input undescribable, and describes as the second input a clock that is not routed into the controller. Patch 1 describes the three inputs for the Glymur, Nord and SM8750 compatibles and keeps the two-input description for the rest. Patches 2-4 bring the Glymur, SM8750 and Nord videocc nodes in line with it. None of the DTS changes is a functional change. Tested on Nord: video_cc_sleep_clk_src no longer shows up in clk_orphan_summary and is parented to the board sleep clock at 32 kHz, and videocc keeps working with the GCC video AHB clock dropped. Changes in v2: - Rewrite the binding and DTS commit messages in terms of the hardware clock inputs rather than driver behaviour - Drop the Fixes tags - Rebase on next-20261006 and add patch 4 to fix the Nord videocc node - Link to v1: https://lore.kernel.org/all/20260924161152.1162301-1-shengchao.guo@oss.qualcomm.com/ Shawn Guo (4): dt-bindings: clock: qcom,sm8450-videocc: Fix clock inputs for Glymur arm64: dts: qcom: glymur: Add videocc sleep clock arm64: dts: qcom: sm8750: Fix videocc clock inputs arm64: dts: qcom: nord: Fix videocc clock inputs .../bindings/clock/qcom,sm8450-videocc.yaml | 26 ++++++++++++++++--- arch/arm64/boot/dts/qcom/glymur.dtsi | 3 ++- arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8750.dtsi | 3 ++- 4 files changed, 29 insertions(+), 6 deletions(-) -- 2.43.0