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On TI J721S2 EVMs, the DP0 HPD resistor is DNI from factory, so the HPD signal is not physically connected to SoC pin AA24 by default. AA24 must still be in DP0_HPD mux mode for the MHDP firmware to operate. When 'no-hpd' is set, DRM_BRIDGE_OP_HPD is omitted and the framework falls back to polling .detect() every ~10 seconds. Presence is detected by reading DP_DPCD_REV (0x000) over AUX, with an early exit when the monitor is stably connected to avoid re-programming the stream each poll. Changes since v6: - Reverted back to dev_dbg instead of dev_err for the normal hpd case. - Picked up Acked-by from Krzysztof Kozlowski from v6 on the bindings patch. Link to v6: https://lore.kernel.org/all/20260802153825.1570435-1-y-d@ti.com/ Rahul T R (2): dt-bindings: display: bridge: cdns,mhdp8546: Add no-hpd property to the cadence bridge drm: bridge: cdns-mhdp8546: Add no-hpd property .../display/bridge/cdns,mhdp8546.yaml | 11 +++ .../drm/bridge/cadence/cdns-mhdp8546-core.c | 69 +++++++++++++++++-- .../drm/bridge/cadence/cdns-mhdp8546-core.h | 1 + 3 files changed, 75 insertions(+), 6 deletions(-) -- 2.34.1