From: Conor Dooley <conor@kernel.org>
To: "Christian Marangi (Ansuel)" <ansuelsmth@gmail.com>
Cc: MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] dt-bindings: devfreq: Document support for Airoha Subsystem Scale
Date: Mon, 12 Oct 2026 19:33:14 +0100 [thread overview]
Message-ID: <20261012-clatter-exclude-f9d59f1cf2ff@spud> (raw)
In-Reply-To: <CA+_ehUyP35PF6cm17dzeLcREVFEPv=89Do-s5-hm-T3mKveuKQ@mail.gmail.com>
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On Fri, Oct 09, 2026 at 05:15:27PM +0200, Christian Marangi (Ansuel) wrote:
> Il giorno ven 9 ott 2026 alle ore 17:06 Conor Dooley
> <conor@kernel.org> ha scritto:
> >
> > On Fri, Oct 09, 2026 at 09:33:28AM +0200, Christian Marangi wrote:
> > > Airoha SoC contains multiple subsystems that are scaled to a
> > > specific OPP taking the CPU clock as reference. Such subsystem
> > > can enter idle or performance state based on the system load
> > > and power consumption conditions.
> > >
> > > Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
> > > Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...
> >
> > The device you document here does not appear to exist at all, since it
> > just consumes a clock without any registers or anything. Why can't these
> > operating points be added to the actual consumers: the switch, the npu,
> > or event the bus itself in one case. In the bus case, I think that's
> > exactly what simple-pm-bus does?
> >
>
> Can the consumer be registered as a devfreq with all the other thing?
What do you mean exactly? Are you asking if a node can be a switch and a
devfreq, or a bus and a devfreq, at the same time? The answer to that is
yes.
> Isn't that problematic?
It's not clear to me, what do you think might be problematic?
> Also one big problem is that some subsystem are used internally.
> Example SOE and BUS. (and also NPU)
What does "used internally" mean?
> How those can be configured to follow the CPU frequency and
> use the required-opp and opp?
At least in the bus case, you'd be far from the only device with a
devfreq driver. I don't see any accelerators that register with devfreq,
but I see there's a bunch of GPU drivers that do, so there's prior art
in that subsystem for being one. That should work (I think) and doesn't
involve registering fake consumers of clocks?
Cheers,
Conor.
>
> > >
> > > Document all the required property and provide examples for the various
> > > subsystem OPP + subsystem scale nodes.
> > >
> > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > > ---
> > > .../devfreq/airoha,subsystem-scale.yaml | 114 ++++++++++++++++++
> > > 1 file changed, 114 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> > > new file mode 100644
> > > index 000000000000..2cf7f23a926c
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> > > @@ -0,0 +1,114 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/devfreq/airoha,subsystem-scale.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Airoha SoC Subsystem Scale Driver
> > > +
> > > +maintainers:
> > > + - Christian Marangi <ansuelsmth@gmail.com>
> > > +
> > > +description:
> > > + Airoha SoC contains multiple subsystems that are scaled to a
> > > + specific OPP taking the CPU clock as reference. Such subsystem
> > > + can enter idle or performance state based on the system load
> > > + and power consumption conditions.
> > > +
> > > + Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
> > > + Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...
> > > +
> > > +properties:
> > > + compatible:
> > > + const: airoha,an7581-subsystem-scale
> > > +
> > > + clocks:
> > > + maxItems: 1
> > > +
> > > + operating-points-v2:
> > > + description:
> > > + OPP table of the related subsystem supported rates that referenced
> > > + clocks will be scaled to.
> > > +
> > > +required:
> > > + - compatible
> > > + - clocks
> > > + - operating-points-v2
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + #include <dt-bindings/clock/en7523-clk.h>
> > > +
> > > + npu_opp_table: opp-table-npu {
> > > + compatible = "operating-points-v2";
> > > +
> > > + npu_low: opp-400000000 {
> > > + opp-hz = /bits/ 64 <400000000>;
> > > + };
> > > +
> > > + npu_high: opp-720000000 {
> > > + opp-hz = /bits/ 64 <720000000>;
> > > + };
> > > + };
> > > +
> > > + emi_opp_table: opp-table-emi {
> > > + compatible = "operating-points-v2";
> > > +
> > > + emi_low: opp-400000000 {
> > > + opp-hz = /bits/ 64 <400000000>;
> > > + };
> > > +
> > > + emi_high: opp-540000000 {
> > > + opp-hz = /bits/ 64 <540000000>;
> > > + };
> > > + };
> > > +
> > > + bus_opp_table: opp-table-bus {
> > > + compatible = "operating-points-v2";
> > > +
> > > + bus_low: opp-200000000 {
> > > + opp-hz = /bits/ 64 <200000000>;
> > > + };
> > > +
> > > + bus_high: opp-300000000 {
> > > + opp-hz = /bits/ 64 <300000000>;
> > > + };
> > > + };
> > > +
> > > + gsw_opp_table: opp-table-gsw {
> > > + compatible = "operating-points-v2";
> > > +
> > > + gsw_low: opp-200000000 {
> > > + opp-hz = /bits/ 64 <200000000>;
> > > + };
> > > +
> > > + gsw_high: opp-500000000 {
> > > + opp-hz = /bits/ 64 <500000000>;
> > > + };
> > > + };
> > > +
> > > + npu-subsystem {
> > > + compatible = "airoha,an7581-subsystem-scale";
> > > + operating-points-v2 = <&npu_opp_table>;
> > > + clocks = <&scuclk EN7523_CLK_NPU>;
> > > + };
> > > +
> > > + emi-subsystem {
> > > + compatible = "airoha,an7581-subsystem-scale";
> > > + operating-points-v2 = <&emi_opp_table>;
> > > + clocks = <&scuclk EN7523_CLK_EMI>;
> > > + };
> > > +
> > > + bus-subsystem {
> > > + compatible = "airoha,an7581-subsystem-scale";
> > > + operating-points-v2 = <&bus_opp_table>;
> > > + clocks = <&scuclk EN7523_CLK_BUS>;
> > > + };
> > > +
> > > + gsw-subsystem {
> > > + compatible = "airoha,an7581-subsystem-scale";
> > > + operating-points-v2 = <&gsw_opp_table>;
> > > + clocks = <&scuclk EN7523_CLK_GSW>;
> > > + };
> > > --
> > > 2.55.0
> > >
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next prev parent reply other threads:[~2026-10-12 18:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 7:33 [PATCH v2 0/2] PM / devfreq: add Airoha SoC Subsystem scale support Christian Marangi
2026-10-09 7:33 ` [PATCH v2 1/2] dt-bindings: devfreq: Document support for Airoha Subsystem Scale Christian Marangi
2026-10-09 7:39 ` sashiko-bot
2026-10-09 15:06 ` Conor Dooley
2026-10-09 15:15 ` Christian Marangi (Ansuel)
2026-10-12 18:33 ` Conor Dooley [this message]
2026-10-09 7:33 ` [PATCH v2 2/2] PM / devfreq: add Airoha SoC Subsystem devfreq driver Christian Marangi
2026-10-09 7:46 ` sashiko-bot
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