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Mon, 12 Oct 2026 12:02:47 -0700 (PDT) From: Alex Elder To: tglx@kernel.org, radu@rendec.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: p.zabel@pengutronix.de, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, danielt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/2] irqchip: add TC9564 support Date: Mon, 12 Oct 2026 14:02:42 -0500 Message-ID: <20261012190245.3988619-1-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds support for the "MSIGEN" (MSI generator) interrupt controller present within the Toshiba TC9564 SoC. This device collects interrupts generated within the TC9564 and forwards them to the host as MSIs. The TC9564 attaches to a host system via PCIe. It includes a PCIe switch with three downstream ports. An embedded PCIe endpoint is attached to one of these ports, and it implements two PCI functions. Each PCI function implements an MSIGEN unit. Access to the registers used by an MSIGEN is provided by a PCI endpoint bus, which exposes BAR4 of the PCI function it is associated with. -Alex Alex Elder (1): dt-bindings: interrupt-controller: introduce toshiba,tc9564-msigen.yaml Daniel Thompson (1): irqchip: introduce TC9564 SoC MSIGEN support .../toshiba,tc9564-msigen.yaml | 70 ++++++ MAINTAINERS | 7 + drivers/irqchip/Kconfig | 10 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-tc9564-msigen.c | 203 ++++++++++++++++++ 5 files changed, 291 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/toshiba,tc9564-msigen.yaml create mode 100644 drivers/irqchip/irq-tc9564-msigen.c base-commit: becb95e45ef0dda9ffb35156d909d3da7a2789c3 -- 2.53.0