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Wed, 14 Oct 2026 00:46:00 -0700 (PDT) Received: from localhost ([2001:19f0:8000:3e6e:5400:6ff:fe38:3d01]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e841a05f70sm65986985ad.7.2026.10.14.00.45.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 00:46:00 -0700 (PDT) From: Inochi Amaoto To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Albert Ou , Alexandre Ghiti Cc: devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Yixun Lan , Longbin Li Subject: [PATCH 2/3] nvmem: Add Sophgo SG2044 eFuse driver Date: Wed, 14 Oct 2026 15:45:14 +0800 Message-ID: <20261014074516.240247-3-inochiama@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261014074516.240247-1-inochiama@gmail.com> References: <20261014074516.240247-1-inochiama@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sophgo SoCs such as SG2044 contain eFuses used to store factory-programmed data. As for SG2044, HW automatically loads the eFuse content into shadow registers which are organized as 32bit values exposed as MMIO. Signed-off-by: Inochi Amaoto --- drivers/nvmem/Kconfig | 12 +++ drivers/nvmem/Makefile | 2 + drivers/nvmem/sophgo-efuse.c | 176 +++++++++++++++++++++++++++++++++++ 3 files changed, 190 insertions(+) create mode 100644 drivers/nvmem/sophgo-efuse.c diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index c36c2a4c2a0b..a7936dd65bdd 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -465,6 +465,18 @@ config NVMEM_SNVS_LPGPR This driver can also be built as a module. If so, the module will be called nvmem-snvs-lpgpr. +config NVMEM_SOPHGO_EFUSE + tristate "Sophgo eFuse support" + depends on ARCH_SOPHGO || COMPILE_TEST + default ARCH_SOPHGO + help + Say y here to enable support for reading eFuses on Sophgo SoCs + such as the CV1800B. These are e.g. used to store factory programmed + calibration data required for the builtin ethernet PHY. + + This driver can also be built as a module. If so, the module will + be called nvmem-sophgo-efuse. + config NVMEM_SPMI_SDAM tristate "SPMI SDAM Support" depends on SPMI diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 2bbfb9ff1885..430ddddf8c3c 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -79,6 +79,8 @@ obj-$(CONFIG_NVMEM_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o nvmem-sc27xx-efuse-y := sc27xx-efuse.o obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o nvmem_snvs_lpgpr-y := snvs_lpgpr.o +obj-$(CONFIG_NVMEM_SOPHGO_EFUSE) += nvmem-sophgo-efuse.o +nvmem-sophgo-efuse-y := sophgo-efuse.o obj-$(CONFIG_NVMEM_SPMI_SDAM) += nvmem_qcom-spmi-sdam.o nvmem_qcom-spmi-sdam-y += qcom-spmi-sdam.o obj-$(CONFIG_NVMEM_SPRD_EFUSE) += nvmem_sprd_efuse.o diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c new file mode 100644 index 000000000000..5f90adaf8e4f --- /dev/null +++ b/drivers/nvmem/sophgo-efuse.c @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Sophgo SoC eFuse driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SG2044_EFUSE_CONTENT_SIZE 0x400 + +#define SG2044_EFUSE_MD 0x000 +#define SG2044_EFUSE_ADR 0x004 +#define SG2044_EFUSE_RD_DATA 0x00c + +#define SG2044_EFUSE_MODE GENMASK(1, 0) +#define SG2044_EFUSE_MODE_READ 2 + +#define SG2044_EFUSE_BOOT_DONE BIT(7) +#define SG2044_BOOT_TIMEOUT 10000 + +#define SG2044_EFUSE_ADR_ADDR GENMASK(7, 0) + +#define SG2044_EFUSE_ALIGN 4 + +struct sophgo_efuses { + void __iomem *base; + struct clk_bulk_data *clks; + int num_clks; + struct mutex mutex; +}; + +static int sg2044_efuse_wait_mode(struct sophgo_efuses *efuse) +{ + u32 value; + + return readl_poll_timeout(efuse->base + SG2044_EFUSE_MD, value, + FIELD_GET(SG2044_EFUSE_MODE, value) == 0, + 1, SG2044_BOOT_TIMEOUT); +} + +static int sg2044_efuse_set_mode(struct sophgo_efuses *efuse, int mode) +{ + u32 val = readl(efuse->base + SG2044_EFUSE_MD); + + val &= ~SG2044_EFUSE_MODE; + val |= FIELD_PREP(SG2044_EFUSE_MODE, mode); + + writel(val, efuse->base + SG2044_EFUSE_MD); + + return sg2044_efuse_wait_mode(efuse); +} + +static u32 sg2044_efuses_read_strip(struct sophgo_efuses *efuse, + unsigned int offset, u32 *strip) +{ + u32 val = FIELD_PREP(SG2044_EFUSE_ADR_ADDR, offset); + int ret; + + guard(mutex)(&efuse->mutex); + + writel(val, efuse->base + SG2044_EFUSE_ADR); + + ret = sg2044_efuse_set_mode(efuse, SG2044_EFUSE_MODE_READ); + if (ret < 0) + return ret; + + *strip = readl(efuse->base + SG2044_EFUSE_RD_DATA); + + return 0; +} + +static int sg2044_efuses_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct sophgo_efuses *efuse = context; + unsigned int start, start_offset, end, i; + u32 value; + u8 *buf; + int ret; + + start = rounddown(offset, SG2044_EFUSE_ALIGN); + end = roundup(offset + bytes, SG2044_EFUSE_ALIGN); + start_offset = offset - start; + + start /= SG2044_EFUSE_ALIGN; + end /= SG2044_EFUSE_ALIGN; + + ret = readl_poll_timeout(efuse->base + SG2044_EFUSE_MD, value, + (value & SG2044_EFUSE_BOOT_DONE), + 1, SG2044_BOOT_TIMEOUT); + if (ret < 0) + return ret; + + buf = kzalloc(end - start, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + for (i = start; i < end; i++) { + ret = sg2044_efuses_read_strip(efuse, i, &value); + if (ret) + goto failed; + + memcpy(&buf[(i - start) * 4], &value, SG2044_EFUSE_ALIGN); + } + + memcpy(val, buf + start_offset, bytes); + +failed: + kfree(buf); + + return ret; +} + +static int sophgo_efuses_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sophgo_efuses *efuse; + struct nvmem_config config = { + .dev = &pdev->dev, + .add_legacy_fixed_of_cells = true, + .read_only = true, + .reg_read = sg2044_efuses_read, + .stride = 1, + .word_size = 1, + .name = "sophgo-efuse", + .id = NVMEM_DEVID_AUTO, + .root_only = true, + }; + + efuse = devm_kzalloc(dev, sizeof(*efuse), GFP_KERNEL); + if (!efuse) + return -ENOMEM; + + efuse->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(efuse->base)) + return PTR_ERR(efuse->base); + + efuse->num_clks = devm_clk_bulk_get_all_enabled(&pdev->dev, &efuse->clks); + if (efuse->num_clks < 0) + return dev_err_probe(dev, efuse->num_clks, "failed to get clocks\n"); + + config.priv = efuse; + config.size = SG2044_EFUSE_CONTENT_SIZE; + + return PTR_ERR_OR_ZERO(devm_nvmem_register(config.dev, &config)); +} + +static const struct of_device_id sophgo_efuses_of_match[] = { + { .compatible = "sophgo,sg2044-efuse", }, + {} +}; + +MODULE_DEVICE_TABLE(of, sophgo_efuses_of_match); + +static struct platform_driver sophgo_efuses_driver = { + .driver = { + .name = "sophgo_efuse", + .of_match_table = sophgo_efuses_of_match, + }, + .probe = sophgo_efuses_probe, +}; + +module_platform_driver(sophgo_efuses_driver); + +MODULE_AUTHOR("Inochi Amaoto "); +MODULE_DESCRIPTION("Sophgo efuse driver"); +MODULE_LICENSE("GPL"); -- 2.56.0