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Fri, 16 Oct 2026 04:33:05 -0500 From: Srinivas Neeli Date: Fri, 16 Oct 2026 15:02:06 +0530 Subject: [PATCH net-next v3 7/8] net: xilinx: tsn: add the endpoint TX data path Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20261016-patches_v2_external-v3-7-e33d3960ca1e@amd.com> References: <20261016-patches_v2_external-v3-0-e33d3960ca1e@amd.com> In-Reply-To: <20261016-patches_v2_external-v3-0-e33d3960ca1e@amd.com> To: Nagadheeraj Rottela , Andrew Lunn , "David S. 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Select the TX channel by indexing tx_chans[] with the frame's logical queue. ep_init_dmaengine() fills that array in logical-queue order, so the index maps to the channel that queue's descriptors were set up on. The driver consults tx_dma_chan_map[] only to reject a queue with no mapping. Map the frame and submit it to that channel. Stop the queue when the ring runs out of space, and wake it from the completion callback once a slot opens. Co-developed-by: Nagadheeraj Rottela Signed-off-by: Nagadheeraj Rottela Signed-off-by: Srinivas Neeli --- Changes in v3: - Free a DMA-error TX frame with dev_kfree_skb_any() and a completed one with dev_consume_skb_any(), so dropped frames are not reported as delivered. - Add skb_tx_timestamp() at the hardware handoff for software TX timestamps. - Skip the queue wake in the completion callback while closing. Use __netif_txq_completed_wake() with the closing flag, and set ep->closing before netif_tx_disable(). - Reword the body to state that tx_chans[] is indexed by logical queue, and drop the description of a runtime channel lookup that no longer exists. Changes in v2: - Take the scatterlist entry count from skb_to_sgvec() instead of assuming nr_frags + 1, so dma_map_sg() cannot walk past the end of the list. - Check dmaengine_submit() with dma_submit_error() before advancing the ring head and charging BQL, and drop the frame if the submit fails. - Publish the ring head with WRITE_ONCE(), paired with the READ_ONCE() on the completion side. - Take the ring size from the channel instead of the compile-time constant. - Use dmaengine_prep_slave_sg() instead of calling the ops member directly. - Move tx_lock into the per-channel struct, mirroring rx_lock, so independent TX queues do not serialise on one device-wide lock. - Narrow the tx_lock kernel-doc to what it actually protects. - Mark the ring_tail store in the completion callback with WRITE_ONCE() to match the READ_ONCE() readers. - Use the spinlock_bh guard class in the completion callback so it matches the spin_lock_bh() in the xmit path. - Index tx_chans directly by logical queue in ep_start_xmit() and drop the phys_chan/dma_dev locals, so the transmit path no longer re-derives the channel through tx_dma_chan_map. --- drivers/net/ethernet/xilinx/tsn/xilinx_tsn_ep.c | 155 +++++++++++++++++++++++- 1 file changed, 153 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/xilinx/tsn/xilinx_tsn_ep.c b/drivers/net/ethernet/xilinx/tsn/xilinx_tsn_ep.c index 0a13e04d4057..bd8cd504cefb 100644 --- a/drivers/net/ethernet/xilinx/tsn/xilinx_tsn_ep.c +++ b/drivers/net/ethernet/xilinx/tsn/xilinx_tsn_ep.c @@ -28,6 +28,8 @@ #include #include +#include + #include "xilinx_tsn.h" #define DRIVER_NAME "xilinx_tsn_ep" @@ -81,6 +83,7 @@ struct skbuf_dma_descriptor { * @ring_tail: consumer index * @ring_size: number of slots in @skb_ring * @rx_lock: serialises @ring_head between the RX callback and the refill timer + * @tx_lock: serialises @ring_head and @ring_tail between xmit and TX completion * @rx_refill_timer: retries RX refill after an allocation failure * @is_tx: true for TX channels, false for RX */ @@ -93,6 +96,7 @@ struct xlnx_tsn_ep_dma_chan { u32 ring_tail; u32 ring_size; spinlock_t rx_lock; /* serialises @ring_head */ + spinlock_t tx_lock; /* serialises @ring_head and @ring_tail */ struct timer_list rx_refill_timer; bool is_tx; }; @@ -310,8 +314,150 @@ static void ep_dma_rx_cb(void *data, const struct dmaengine_result *result) ep_rx_refill(xchan, true); } +static void ep_dma_tx_cb(void *data, const struct dmaengine_result *result) +{ + struct xlnx_tsn_ep_dma_chan *xchan = data; + struct skbuf_dma_descriptor *skbuf_dma; + struct netdev_queue *txq; + struct net_device *ndev; + struct scatterlist *sgl; + struct sk_buff *skb; + int sg_len; + int len; + + scoped_guard(spinlock_bh, &xchan->tx_lock) { + skbuf_dma = ep_get_desc(xchan, + xchan->ring_tail & (xchan->ring_size - 1)); + if (!skbuf_dma || !skbuf_dma->skb) + return; + + skb = skbuf_dma->skb; + sgl = skbuf_dma->sgl; + sg_len = skbuf_dma->sg_len; + + dma_unmap_sg(xchan->dma_dev, sgl, sg_len, DMA_TO_DEVICE); + + skbuf_dma->skb = NULL; + WRITE_ONCE(xchan->ring_tail, xchan->ring_tail + 1); + } + + ndev = skb->dev; + txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb)); + len = skb->len; + + if (unlikely(result->result != DMA_TRANS_NOERROR)) { + DEV_STATS_INC(ndev, tx_errors); + dev_kfree_skb_any(skb); + } else { + DEV_STATS_INC(ndev, tx_packets); + DEV_STATS_ADD(ndev, tx_bytes, len); + dev_consume_skb_any(skb); + } + + __netif_txq_completed_wake(txq, 1, len, + CIRC_SPACE(READ_ONCE(xchan->ring_head), + READ_ONCE(xchan->ring_tail), + xchan->ring_size), 2, + READ_ONCE(xchan->ep->closing)); +} + static netdev_tx_t ep_start_xmit(struct sk_buff *skb, struct net_device *ndev) { + struct dma_async_tx_descriptor *dma_tx_desc; + struct xlnx_tsn_ep *ep = netdev_priv(ndev); + struct skbuf_dma_descriptor *skbuf_dma; + int queue = skb_get_queue_mapping(skb); + struct xlnx_tsn_ep_dma_chan *xchan; + struct netdev_queue *txq; + int sg_len, nents, ret; + dma_cookie_t cookie; + + if (unlikely(queue >= ep->num_tx_queues)) { + if (net_ratelimit()) + netdev_warn(ndev, "Invalid TX queue %d (max %u)\n", + queue, ep->num_tx_queues); + goto err_drop_skb; + } + + if (ep->tx_dma_chan_map[queue] == TSN_DMA_CH_INVALID) { + if (net_ratelimit()) + netdev_warn(ndev, "Logical TX queue %d has invalid DMA mapping\n", + queue); + goto err_drop_skb; + } + + xchan = ep->tx_chans[queue]; + + sg_len = skb_shinfo(skb)->nr_frags + 1; + txq = netdev_get_tx_queue(ndev, queue); + + spin_lock_bh(&xchan->tx_lock); + if (CIRC_SPACE(xchan->ring_head, READ_ONCE(xchan->ring_tail), + xchan->ring_size) <= 1) { + netif_txq_try_stop(txq, + CIRC_SPACE(xchan->ring_head, + READ_ONCE(xchan->ring_tail), + xchan->ring_size), + 2); + spin_unlock_bh(&xchan->tx_lock); + if (net_ratelimit()) + netdev_warn(ndev, "TSN TX ring full\n"); + + return NETDEV_TX_BUSY; + } + + skbuf_dma = ep_get_desc(xchan, xchan->ring_head & (xchan->ring_size - 1)); + if (!skbuf_dma) { + spin_unlock_bh(&xchan->tx_lock); + goto err_drop_skb; + } + spin_unlock_bh(&xchan->tx_lock); + + sg_init_table(skbuf_dma->sgl, sg_len); + ret = skb_to_sgvec(skb, skbuf_dma->sgl, 0, skb->len); + if (ret < 0) + goto err_drop_skb; + sg_len = ret; + + nents = dma_map_sg(xchan->dma_dev, skbuf_dma->sgl, sg_len, DMA_TO_DEVICE); + if (!nents) + goto err_drop_skb; + + dma_tx_desc = dmaengine_prep_slave_sg(xchan->chan, skbuf_dma->sgl, + nents, DMA_MEM_TO_DEV, + DMA_PREP_INTERRUPT); + if (!dma_tx_desc) + goto err_unmap_sg; + + skbuf_dma->skb = skb; + skbuf_dma->sg_len = sg_len; + dma_tx_desc->callback_param = xchan; + dma_tx_desc->callback_result = ep_dma_tx_cb; + + spin_lock_bh(&xchan->tx_lock); + cookie = dmaengine_submit(dma_tx_desc); + if (dma_submit_error(cookie)) { + spin_unlock_bh(&xchan->tx_lock); + skbuf_dma->skb = NULL; + goto err_unmap_sg; + } + WRITE_ONCE(xchan->ring_head, xchan->ring_head + 1); + netdev_tx_sent_queue(txq, skb->len); + netif_txq_maybe_stop(txq, + CIRC_SPACE(xchan->ring_head, + READ_ONCE(xchan->ring_tail), + xchan->ring_size), + 2, 2); + spin_unlock_bh(&xchan->tx_lock); + + skb_tx_timestamp(skb); + dma_async_issue_pending(xchan->chan); + + return NETDEV_TX_OK; + +err_unmap_sg: + dma_unmap_sg(xchan->dma_dev, skbuf_dma->sgl, sg_len, DMA_TO_DEVICE); +err_drop_skb: dev_kfree_skb_any(skb); DEV_STATS_INC(ndev, tx_dropped); return NETDEV_TX_OK; @@ -342,10 +488,13 @@ static int ep_open(struct net_device *ndev) static int ep_stop(struct net_device *ndev) { struct xlnx_tsn_ep *ep = netdev_priv(ndev); + unsigned int i; - netif_tx_disable(ndev); WRITE_ONCE(ep->closing, true); + netif_tx_disable(ndev); ep_exit_dmaengine(ep); + for (i = 0; i < ndev->num_tx_queues; i++) + netdev_tx_reset_subqueue(ndev, i); return 0; } @@ -401,7 +550,9 @@ ep_alloc_dma_chan(struct xlnx_tsn_ep *ep, struct dma_chan *dma_chan, chan->ep = ep; chan->ring_size = ring_size; chan->dma_dev = dmaengine_get_dma_device(chan->chan); - if (!is_tx) { + if (is_tx) { + spin_lock_init(&chan->tx_lock); + } else { spin_lock_init(&chan->rx_lock); timer_setup(&chan->rx_refill_timer, ep_rx_refill_timer, 0); } -- 2.44.4