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Describe these interrupts with the "aer" name so the controller driver can use them for Root Port error reporting. Append the new interrupts to preserve the existing interrupt indices. Suggested-by: Marek Vasut Reviewed-by: Marek Vasut Signed-off-by: Koichiro Den --- Changes since v4: - Add Marek's Reviewed-by tag. No code changes. arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 5284923b6cef..8342d3c6f988 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -801,8 +801,9 @@ pciec0: pcie@e65d0000 { interrupts = , , , - ; - interrupt-names = "msi", "dma", "sft_ce", "app"; + , + ; + interrupt-names = "msi", "dma", "sft_ce", "app", "aer"; clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; clock-names = "core", "ref"; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; @@ -850,8 +851,9 @@ pciec1: pcie@e65d8000 { interrupts = , , , - ; - interrupt-names = "msi", "dma", "sft_ce", "app"; + , + ; + interrupt-names = "msi", "dma", "sft_ce", "app", "aer"; clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; clock-names = "core", "ref"; power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; -- 2.54.0