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Thu, 22 Oct 2026 04:36:12 -0700 (PDT) Received: from localhost.localdomain ([218.194.41.155]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ada490e5edsm3997668a91.8.2026.10.22.04.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 04:36:12 -0700 (PDT) From: ShiTou Hong X-Google-Original-From: ShiTou Hong To: andersson@kernel.org, konradybcio@kernel.org, conor+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, redstonee <1516235445@qq.com>, ShiTou Hong Subject: [PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge Date: Thu, 22 Oct 2026 19:35:57 +0800 Message-ID: <20261022113601.2320940-2-dc_redstone@outlook.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261022113601.2320940-1-dc_redstone@outlook.com> References: <20261022113601.2320940-1-dc_redstone@outlook.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: redstonee <1516235445@qq.com> The sm8250-hdk has a video bridge chip LT9611UXC convertng MIPI DSI to HDMI. Enable the i2c port of the chip, the display controller and DSI port. Add the pinctrl of LT9611UXC's rst&irq pins. Signed-off-by: ShiTou Hong --- arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 123 ++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts index 5975878ea..d92e569d8 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts @@ -44,6 +44,18 @@ vreg_s4a_1p8: pm8150-s4 { vin-supply = <&vph_pwr>; }; + lt9611_1v2: lt9611-vdd12-regulator { + compatible = "regulator-fixed"; + regulator-name = "LT9611_1V2"; + + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vph_pwr>; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + vreg_s6c_0p88: smpc6-regulator { compatible = "regulator-fixed"; regulator-name = "vreg_s6c_0p88"; @@ -63,6 +75,17 @@ key-vol-up { gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; }; }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; }; &apps_rsc { @@ -396,6 +419,10 @@ &qupv3_id_1 { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + &tlmm { gpio-reserved-ranges = <28 4>, <40 4>; @@ -404,6 +431,20 @@ sd_ufs_cd_pins: sd-ufs-cd-pins { function = "gpio"; bias-pull-up; }; + + lt9611_pins: lt9611-pins { + irq-pins { + pins = "gpio1"; + function = "gpio"; + bias-disable; + }; + + rst-pins { + pins = "gpio2"; + function = "gpio"; + output-high; + }; + }; }; &uart12 { @@ -486,3 +527,85 @@ &sdhc_2 { pinctrl-0 = <&sdc2_default_state>, <&sd_ufs_cd_pins>; pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>; }; + +&adsp { + status = "okay"; + firmware-name = "qcom/sm8250/adsp.mbn"; +}; + +&cdsp { + status = "okay"; + firmware-name = "qcom/sm8250/cdsp.mbn"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + lt9611_codec: hdmi-bridge@2b { + compatible = "lontium,lt9611uxc"; + reg = <0x2b>; + #sound-dai-cells = <1>; + + interrupts-extended = <&tlmm 1 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + + vdd-supply = <<9611_1v2>; + vcc-supply = <&vreg_bob>; + + pinctrl-names = "default"; + pinctrl-0 = <<9611_pins>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_a: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dp { + status = "okay"; +}; + +&mdss_dp_out { + data-lanes = <0 1>; +}; + +&mdss_dsi0 { + status = "okay"; + vdda-supply = <&vreg_l9a_1p2>; +}; + +&mdss_dsi0_out { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + status = "okay"; + vdds-supply = <&vreg_l5a_0p88>; +}; -- 2.47.3