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Thu, 22 Oct 2026 04:36:18 -0700 (PDT) Received: from localhost.localdomain ([218.194.41.155]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ada490e5edsm3997668a91.8.2026.10.22.04.36.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 04:36:18 -0700 (PDT) From: ShiTou Hong X-Google-Original-From: ShiTou Hong To: andersson@kernel.org, konradybcio@kernel.org, conor+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, redstonee <1516235445@qq.com>, ShiTou Hong Subject: [PATCH 4/6] arm64: dts: qcom: sm8250-hdk: Enable the PCIe ports Date: Thu, 22 Oct 2026 19:35:59 +0800 Message-ID: <20261022113601.2320940-4-dc_redstone@outlook.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261022113601.2320940-1-dc_redstone@outlook.com> References: <20261022113601.2320940-1-dc_redstone@outlook.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: redstonee <1516235445@qq.com> Enable the 2 PCIe ports on sm8250-hdk. The pcie0 is for the on-board ath11k WiFi; the pcie2 is for the M.2 connector. Signed-off-by: ShiTou Hong --- arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts index 9ff15d9d7..77273b6c2 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts @@ -712,3 +712,24 @@ pm8150b_typec_sbu_out: endpoint { &usb_1_qmpphy_dp_in { remote-endpoint = <&mdss_dp_out>; }; + +&pcie0 { + status = "okay"; +}; + +&pcie0_phy { + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-pll-supply = <&vreg_l9a_1p2>; + status = "okay"; +}; + +&pcie2 { + status = "okay"; + vddpe-3v3-supply = <&vreg_3p3>; +}; + +&pcie2_phy { + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-pll-supply = <&vreg_l9a_1p2>; + status = "okay"; +}; -- 2.47.3