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Fri, 23 Oct 2026 00:29:34 -0700 (PDT) Received: from localhost.localdomain ([218.194.41.155]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ea7af6a466sm6858715ad.9.2026.10.23.00.29.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 00:29:34 -0700 (PDT) From: ShiTou Hong X-Google-Original-From: ShiTou Hong To: andersson@kernel.org, konradybcio@kernel.org, conor+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, ShiTou Hong , KancyJoe Subject: [PATCH 2/6] arm64: dts: qcom: sm8250-hdk: Add LT9611UXC HDMI bridge Date: Fri, 23 Oct 2026 15:28:28 +0800 Message-ID: <20261023072832.2642647-2-dc_redstone@outlook.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261023072832.2642647-1-dc_redstone@outlook.com> References: <20261023072832.2642647-1-dc_redstone@outlook.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The sm8250-hdk has a video bridge chip LT9611UXC converting MIPI DSI to HDMI, which hasn't been added in the dts, so we have no HDMI signal. Add the 1V2 supply node for the chip and the HDMI connector node. Enable the i2c port of the chip, the display controller and DSI port. Add the pinctrl of LT9611UXC's RST and IRQ pins. Co-developed-by: KancyJoe Signed-off-by: ShiTou Hong --- arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 105 ++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts index a049d78f5..0bc946682 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts @@ -44,6 +44,18 @@ vreg_s4a_1p8: pm8150-s4 { vin-supply = <&vph_pwr>; }; + lt9611_1v2: lt9611-vdd12-regulator { + compatible = "regulator-fixed"; + regulator-name = "LT9611_1V2"; + + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vph_pwr>; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + vreg_s6c_0p88: smpc6-regulator { compatible = "regulator-fixed"; regulator-name = "vreg_s6c_0p88"; @@ -63,6 +75,17 @@ key-vol-up { gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; }; }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; }; &apps_rsc { @@ -396,6 +419,10 @@ &qupv3_id_1 { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + &tlmm { gpio-reserved-ranges = <28 4>, <40 4>; @@ -424,6 +451,20 @@ clk-pins { drive-strength = <16>; }; }; + + lt9611_pins: lt9611-default-state { + irq-pins { + pins = "gpio1"; + function = "gpio"; + bias-disable; + }; + + rst-pins { + pins = "gpio2"; + function = "gpio"; + output-high; + }; + }; }; &uart12 { @@ -506,3 +547,67 @@ &sdhc_2 { pinctrl-0 = <&sdc2_default>, <&sd_ufs_cd_pins>; pinctrl-1 = <&sdc2_sleep_state>, <&sd_ufs_cd_pins>; }; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + lt9611_codec: hdmi-bridge@2b { + compatible = "lontium,lt9611uxc"; + reg = <0x2b>; + #sound-dai-cells = <1>; + + interrupts-extended = <&tlmm 1 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + + vdd-supply = <<9611_1v2>; + vcc-supply = <&vreg_bob>; + + pinctrl-names = "default"; + pinctrl-0 = <<9611_pins>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_a: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; + vdda-supply = <&vreg_l9a_1p2>; +}; + +&mdss_dsi0_out { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + status = "okay"; + vdds-supply = <&vreg_l5a_0p88>; +}; -- 2.47.3