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[93.34.92.187]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-48e380310b3sm5076321f8f.22.2026.10.23.04.57.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 04:57:00 -0700 (PDT) From: Christian Marangi To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 2/2] gpio: 74x164: add support for 74lv164 shift register variant Date: Fri, 23 Oct 2026 13:56:49 +0200 Message-ID: <20261023115652.700765-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261023115652.700765-1-ansuelsmth@gmail.com> References: <20261023115652.700765-1-ansuelsmth@gmail.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add compatible and spi define to support 74lv164 shift register variant. These work the same way as the 59x chip family with the only difference of not having a "storage" feature by directly changing the outputs as bits are shifted in without having to toggle extra pins. Signed-off-by: Christian Marangi --- drivers/gpio/gpio-74x164.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c index 5ca61cf5206a..46562c348c9c 100644 --- a/drivers/gpio/gpio-74x164.c +++ b/drivers/gpio/gpio-74x164.c @@ -181,6 +181,7 @@ static int gen_74x164_probe(struct spi_device *spi) static const struct spi_device_id gen_74x164_spi_ids[] = { { .name = "74hc595" }, + { .name = "74lv164" }, { .name = "74lvc594" }, {}, }; @@ -188,6 +189,7 @@ MODULE_DEVICE_TABLE(spi, gen_74x164_spi_ids); static const struct of_device_id gen_74x164_dt_ids[] = { { .compatible = "fairchild,74hc595" }, + { .compatible = "nxp,74lv164" }, { .compatible = "nxp,74lvc594" }, {}, }; -- 2.55.0