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[144.49.247.120]) by smtp-relay.gmail.com with ESMTPS id 98e67ed59e1d1-3ae40619e2csm259519a91.6.2026.10.26.11.29.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Oct 2026 11:29:39 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-dy1-f200.google.com with SMTP id 5a478bee46e88-359b81ad4e8so4801765eec.0 for ; Mon, 26 Oct 2026 11:29:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1793039377; x=1793644177; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=p/JejeyXs+a2BV9S3GP+DdWRq7anNloDPZ8ebf8LoQg=; b=WkWvrgmdvdVuovyLoQ3QJgYuz1ZkJj9eQ56bDBXGJlNmvDc5/db+VnWwVBgraYA3BX 5NqUKfVwLYOR5Uq5CWryYRJgPNXZ2AIdqgoaHz2WDjt3tA3B6N4nzczbwzWlzxEZFunG U6FMoXcAUqSPRCdf0kOkcjTd9hVjcAYxjwkvM= X-Forwarded-Encrypted: i=1; AKwUvBw5BXfMgt1/uUFkf2gdqpk6RTPSGhfa0bPJiH77m2PpT4uOW6qsPhEv5uYDtBOOyAM2GQAUKzvTWgFG@vger.kernel.org X-Received: by 2002:a05:7301:b0b:b0:365:921:8ce with SMTP id 5a478bee46e88-369e84e8888mr9413481eec.32.1793039376876; Mon, 26 Oct 2026 11:29:36 -0700 (PDT) X-Received: by 2002:a05:7301:b0b:b0:365:921:8ce with SMTP id 5a478bee46e88-369e84e8888mr9413439eec.32.1793039376159; Mon, 26 Oct 2026 11:29:36 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a01fa4c58sm24657259eec.21.2026.10.26.11.29.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2026 11:29:35 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ray Jui , Scott Branden , Broadcom internal kernel review list , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Kishon Vijay Abraham I , Tejun Heo , Yendapally Reddy Dhananjaya Reddy , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM IPROC ARM ARCHITECTURE), linux-phy@lists.infradead.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v2 6/6] ARM: dts: broadcom: Enable SATA on BCM958625HR Date: Mon, 26 Oct 2026 11:28:56 -0700 Message-ID: <20261026182856.3168686-7-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261026182856.3168686-1-florian.fainelli@broadcom.com> References: <20261026182856.3168686-1-florian.fainelli@broadcom.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Commit 77416ab35f57 ("ARM: dts: NSP: Disable AHCI controller for HR NSP boards") disabled AHCI after reports of boot hangs. Both SATA PHYs remain enabled, but the disabled controller leaves the eSATA ports unavailable. With explicit IDM clock/reset setup and the corrected shared PHY register aperture in place, enable the controller on BCM958625HR. Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/broadcom/bcm958625hr.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/broadcom/bcm958625hr.dts b/arch/arm/boot/dts/broadcom/bcm958625hr.dts index 53acae385822..f6717ca76aef 100644 --- a/arch/arm/boot/dts/broadcom/bcm958625hr.dts +++ b/arch/arm/boot/dts/broadcom/bcm958625hr.dts @@ -184,6 +184,7 @@ partition@700000 { &sata { /delete-property/ dma-coherent; + status = "okay"; }; &sata_phy0 { -- 2.53.0