From: Conor Dooley <conor@kernel.org>
To: Kwanghoon Son <asdfkwang@gmail.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Boqun Feng" <boqun@kernel.org>, "Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
"Danilo Krummrich" <dakr@kernel.org>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Tamir Duberstein" <tamird@kernel.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Onur Özkan" <work@onurozkan.dev>,
"Thomas Gleixner" <tglx@kernel.org>,
"Radu Rendec" <radu@rendec.net>, "Paul Walmsley" <pjw@kernel.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
"Anup Patel" <anup@brainfault.org>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
rust-for-linux@vger.kernel.org,
"Paul Walmsley" <paul.walmsley@sifive.com>,
linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH RFC 05/12] dt-bindings: serial: Add BL808 UART
Date: Thu, 29 Oct 2026 19:18:38 +0000 [thread overview]
Message-ID: <20261029-sequester-countable-6a7b597c2551@spud> (raw)
In-Reply-To: <20261029-pouch-enunciate-e74cf84e42a7@spud>
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On Thu, Oct 29, 2026 at 06:54:49PM +0000, Conor Dooley wrote:
> On Thu, Oct 29, 2026 at 01:05:46AM -0400, Kwanghoon Son wrote:
> > Describe the UART register range, interrupt and baud clock input.
> > Initial Linux support targets the BL808 32-byte FIFO and reuses
> > Zephyr's bflb,uart compatible. UART3 is D0 PLIC source 20.
> >
> > Link: https://docs.zephyrproject.org/latest/build/dts/api/bindings/serial/bflb,uart.html
> >
> > Signed-off-by: Kwanghoon Son <asdfkwang@gmail.com>
> > ---
> > .../devicetree/bindings/serial/bflb,uart.yaml | 57 ++++++++++++++++++++++
> > 1 file changed, 57 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/serial/bflb,uart.yaml b/Documentation/devicetree/bindings/serial/bflb,uart.yaml
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..df29d258f0a1c6d7bb283cf19c4157436991b64b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/serial/bflb,uart.yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/serial/bflb,uart.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Bouffalo Lab UART Controller
> > +
> > +description: |
> > + UART IP used by Bouffalo Lab SoCs. Initial Linux support covers the
> > + BL808 controller with a 32-byte FIFO. The compatible follows Zephyr.
> > +
> > +maintainers:
> > + - Kwanghoon Son <asdfkwang@gmail.com>
> > +
> > +allOf:
> > + - $ref: serial.yaml#
> > +
> > +properties:
> > + compatible:
> > + const: bflb,uart
>
> This needs to be a device-specific compatible - please just use the
> binding already reviewed and agreed upon in Jisheng's 2023 series.
>
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: Baud rate generator clock
> > +
> > + clock-names:
> > + items:
> > + - const: baud
>
> Drop this clock name, with only one clock there's no more need for it
> than the interrupt-names or reg-names that you do not use either.
And additionally, I see no value in picking something to suit zephyr,
when zephyr uses things like "bflb,clock-controller" or "bflb,pwm-1" and
"bflb,pwm2" and so on. Make a clean break and do things correctly rather
than try (and fail) to be compatible with the zephyr dts.
>
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - clock-names
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > + uart3: serial@30002000 {
> > + compatible = "bflb,uart";
> > + reg = <0x30002000 0x1000>;
> > + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&uart_baud>;
> > + clock-names = "baud";
> > + };
> > +...
> >
> > --
> > 2.47.3
> >
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next prev parent reply other threads:[~2026-10-29 19:18 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-29 5:05 [PATCH RFC 00/12] Add BL808 UART3 support with a Rust serial-core polling console Kwanghoon Son
2026-10-29 5:05 ` [PATCH RFC 01/12] dt-bindings: vendor-prefixes: Add Bouffalo Lab Kwanghoon Son
2026-10-29 18:52 ` Conor Dooley
2026-10-29 5:05 ` [PATCH RFC 02/12] dt-bindings: interrupt-controller: Add BL808 PLIC Kwanghoon Son
2026-10-29 5:05 ` [PATCH RFC 03/12] dt-bindings: timer: Add BL808 CLINT Kwanghoon Son
2026-10-29 5:05 ` [PATCH RFC 04/12] dt-bindings: riscv: Add Bouffalo Lab BL808 Kwanghoon Son
2026-10-29 5:05 ` [PATCH RFC 05/12] dt-bindings: serial: Add BL808 UART Kwanghoon Son
2026-10-29 5:15 ` sashiko-bot
2026-10-29 18:54 ` Conor Dooley
2026-10-29 19:18 ` Conor Dooley [this message]
2026-10-29 5:05 ` [PATCH RFC 06/12] rust: serial: Add minimal serial-core polling console support Kwanghoon Son
2026-10-29 5:37 ` sashiko-bot
2026-10-29 5:05 ` [PATCH RFC 07/12] serial: bflb: Add Rust BL808 polling console Kwanghoon Son
2026-10-29 5:05 ` [PATCH RFC 08/12] riscv: Add Bouffalo Lab SoC selection Kwanghoon Son
2026-10-29 18:58 ` Conor Dooley
2026-10-29 5:05 ` [PATCH RFC 09/12] riscv: dts: bouffalolab: Add BL808 SoC Kwanghoon Son
2026-10-29 19:05 ` Conor Dooley
2026-10-29 5:05 ` [PATCH RFC 10/12] riscv: dts: bouffalolab: Add Sipeed M1s Dock Kwanghoon Son
2026-10-29 19:07 ` Conor Dooley
2026-10-29 5:05 ` [PATCH RFC 11/12] riscv: defconfig: Enable Bouffalo Lab SoCs Kwanghoon Son
2026-10-29 5:05 ` [PATCH RFC 12/12] MAINTAINERS: Add Bouffalo Lab BL808 support Kwanghoon Son
2026-10-29 19:08 ` Conor Dooley
2026-10-29 19:20 ` Conor Dooley
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