From: Dinh Nguyen <dinguyen@kernel.org>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: dinguyen@kernel.org, devicetree@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: stratix10: define the i2c1 pins for pinctrl
Date: Thu, 29 Oct 2026 16:32:01 -0500 [thread overview]
Message-ID: <20261029213201.718625-3-dinguyen@kernel.org> (raw)
In-Reply-To: <20261029213201.718625-1-dinguyen@kernel.org>
Add the I2C pins definition to the Stratix10 SoCDK NAND and eMMC daughter
cards. This allows the I2C driver to use pinctrl on the pins to perform
I2C recovery.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
.../altera/socfpga_stratix10_socdk_emmc.dts | 20 +++++++++++++++++++
.../altera/socfpga_stratix10_socdk_nand.dts | 20 +++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts
index bda2fe059beba..c63af8fa0917a 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts
@@ -12,6 +12,22 @@ / {
"altr,socfpga-stratix10";
};
+&pinctrl0 {
+ i2c1_pmx_func: i2c1-pmx-func-pins {
+ pinctrl-single,pins = <
+ 0x78 0x4 /* I2C1_SDA (IO6) PIN30SEL) */
+ 0x7c 0x4 /* I2C1_SCL (IO7) PIN31SEL */
+ >;
+ };
+
+ i2c1_pmx_func_gpio: i2c1-pmx-func-gpio-pins {
+ pinctrl-single,pins = <
+ 0x78 0x8 /* I2C1_SDA (IO6) PIN30SEL) */
+ 0x7c 0x8 /* I2C1_SCL (IO7) PIN31SEL */
+ >;
+ };
+};
+
&gmac2 {
status = "okay";
/* PHY delays is configured via skew properties */
@@ -57,6 +73,10 @@ &i2c1 {
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&i2c1_pmx_func>;
+ pinctrl-1 = <&i2c1_pmx_func_gpio>;
+
adc@14 {
compatible = "lltc,ltc2497";
reg = <0x14>;
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
index a450c42a6b35f..f69ec2f5b94b6 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
@@ -56,6 +56,22 @@ &gpio1 {
status = "okay";
};
+&pinctrl0 {
+ i2c1_pmx_func: i2c1-pmx-func-pins {
+ pinctrl-single,pins = <
+ 0x78 0x4 /* I2C1_SDA (IO6) PIN30SEL) */
+ 0x7c 0x4 /* I2C1_SCL (IO7) PIN31SEL */
+ >;
+ };
+
+ i2c1_pmx_func_gpio: i2c1-pmx-func-gpio-pins {
+ pinctrl-single,pins = <
+ 0x78 0x8 /* I2C1_SDA (IO6) PIN30SEL) */
+ 0x1c 0x8 /* I2C1_SCL (IO7) PIN31SEL */
+ >;
+ };
+};
+
&gmac2 {
status = "okay";
phy-mode = "rgmii";
@@ -130,6 +146,10 @@ &i2c1 {
i2c-sda-falling-time-ns = <890>; /* hcnt */
i2c-scl-falling-time-ns = <890>; /* lcnt */
+ pinctrl-names = "default", "gpio";
+ pinctrl-0 = <&i2c1_pmx_func>;
+ pinctrl-1 = <&i2c1_pmx_func_gpio>;
+
adc@14 {
compatible = "lltc,ltc2497";
reg = <0x14>;
--
2.42.0.411.g813d9a9188
next prev parent reply other threads:[~2026-10-29 21:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-29 21:31 [PATCH 1/3] arm64: dts: socfpga: agilex5: add the pinctrl node Dinh Nguyen
2026-10-29 21:32 ` [PATCH 2/3] arm64: dts: agilex5: define the i2c0 pins for pinctrl Dinh Nguyen
2026-10-29 21:50 ` sashiko-bot
2026-10-29 21:32 ` Dinh Nguyen [this message]
2026-10-29 22:02 ` [PATCH 3/3] arm64: dts: stratix10: define the i2c1 " sashiko-bot
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