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[93.34.90.148]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4b56f02386bsm58869885e9.7.2026.11.05.04.11.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 04:11:24 -0800 (PST) From: Christian Marangi To: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Felix Fietkau , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v10 0/5] clk: add support for Airoha AN7583 clock Date: Thu, 5 Nov 2026 13:10:53 +0100 Message-ID: <20261105121059.11201-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.55.0 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This small series introduce some cleanup and support for clock and reset of Airoha AN7583. The implementation is similar to EN7581 but AN7583 introduce new reset and more clock divisor support. Changes v10: - Fix whitespace in include patch - Add reset and phy cell as required - Add additional patch for devm variant - Add additional patch for lock for clock and reset access Changes v9: - Fix compilation error for priv (again) (this time fixed) Changes v8: - Add ACK tag by Connor - Fix missing priv->base assign Changes v7: - Add further info for DT patch - Add serdes selection support - Rebase on top of linux-next Link: https://lore.kernel.org/all/20261009070725.13196-1-ansuelsmth@gmail.com/ Changes v6: - Address bot suggestion for DT patch - Add further information on chip-scu phandle - Add dedicated PERSTOUT reset and PCIE_HB reset Link: https://lore.kernel.org/all/20260819221458.30040-1-ansuelsmth@gmail.com/ Changes v5: - Rebase on top of linux-next - Drop even more patch to reduce patch delta - Make chip-scu specific to AN7583 Link: https://lore.kernel.org/all/20260528190000.9164-1-ansuelsmth@gmail.com Changes v4: - Add review tag for DT patch - Fix clock patch to use en7581-chip-scu compatible - Drop PCIE SCU SSR write Changes v3: - Drop .set_rate patch (will be proposed later) - Drop chip-scu binding and related patch Link: https://lore.kernel.org/all/20251106195935.1767696-1-ansuelsmth@gmail.com Changes v2: - Add .set_rate support - Rework DT to EN7581 implementation (clock driver is parent) - Add additional cleanup patch - Merge binding with schema patch - Add chip_scu phandle Christian Marangi (5): dt-bindings: clock: airoha: Document support for AN7583 clock clk: en7523: use devm variant for clk_hw_register and fixed clock clk: en7523: protect concurrent access to reset and PCI register clk: en7523: generalize register clocks function clk: en7523: add support for Airoha AN7583 clock .../bindings/clock/airoha,en7523-scu.yaml | 25 ++ drivers/clk/clk-en7523.c | 332 +++++++++++++++++- include/dt-bindings/clock/en7523-clk.h | 3 + .../dt-bindings/reset/airoha,an7583-reset.h | 65 ++++ 4 files changed, 418 insertions(+), 7 deletions(-) create mode 100644 include/dt-bindings/reset/airoha,an7583-reset.h -- 2.55.0