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Thu, 05 Nov 2026 14:24:42 -0800 (PST) Received: from letov ([62.41.24.155]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b55ac57b9csm2103697a12.15.2026.11.05.14.24.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2026 14:24:41 -0800 (PST) From: Alexander Letuchiy To: Roman Vivchar Cc: Alexander Letuchiy , devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/5] dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT6895 Date: Fri, 6 Nov 2026 01:24:34 +0300 Message-ID: <20261105222435.571449-1-asalde.le1@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: References: X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Roman, Thanks for looking. On Thu, Nov 5, 2026 at 11:50 PM, Roman Vivchar wrote: > Does mt6895 actually share the same reset layout as mt6589? Given the > generation leap between these, the former is very unlikely to use > the same resets. The vendor kernel for this SoC binds the watchdog with the same compatible list ("mediatek,mt6895-wdt", "mediatek,mt6589-wdt") at the same address, and its register definitions are identical to mtk_wdt.c. The TOPRGU reset layout is the one thing I can't confirm, as I found no reset table for MT6895 there. This series does not use it: the DT has no #reset-cells and no consumers. If reset lines are needed later, I will add a dedicated mt6895_data to the driver. I also tested the watchdog on the device: while userspace keeps kicking it, the system stays up, and once the kicks stop the watchdog resets the board after the timeout. Best regards, Alexander