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Tue, 10 Nov 2026 11:30:43 -0800 (PST) Received: from AERO17.taila7786d.ts.net ([45.95.212.224]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3751ad6f11csm7730435eec.0.2026.11.10.11.30.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2026 11:30:43 -0800 (PST) From: Pufan Jin To: Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH 1/2] arm64: dts: rockchip: add USB-C PD support to LubanCat 4 Date: Wed, 11 Nov 2026 03:30:27 +0800 Message-ID: <20261110193028.512456-2-cyan2254650260@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261110193028.512456-1-cyan2254650260@gmail.com> References: <20261110193028.512456-1-cyan2254650260@gmail.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The EmbedFire LubanCat 4 has a Type-C port on the front panel backed by a Fairchild FUSB302 Type-C controller connected to I2C1 (at 0x22). VBUS 5V power is supplied through a fixed regulator enabled by GPIO1_C1 (active high), current-limited to 2A by an LPW5209 switch. Add the FUSB302 node, the fixed VBUS regulator, and the USB-C connector with dual-role power (source 5V/2A, sink 5V/1A) and dual-role data. Wire the HighSpeed data endpoint to usb_host0_xhci and the SuperSpeed data endpoint to usbdp_phy0. Set usb_host0_xhci to OTG mode with usb-role-switch enabled, and add orientation-switch on usbdp_phy0. DisplayPort alternate mode support is added in a subsequent patch. Tested on LubanCat 4 hardware: - fusb302 and tcpm probe cleanly; - USB host mode verified with USB 2.0 and USB 3.0 peripherals; - USB 2.0 devices enumerate and transfer data in both orientations; - USB 3.0 devices enumerate at SuperSpeed (5Gbps) in normal orientation; reverse-orientation SuperSpeed is subject to the known upstream phy-rockchip-usbdp driver reinit limitation; - USB device mode verified via ConfigFS CDC ACM serial gadget connected to a host PC with successful high-speed enumeration and bidirectional data communication; - VBUS switch (LPW5209) enables in source mode and remains disabled in sink mode with reverse current blocked. Signed-off-by: Pufan Jin --- .../boot/dts/rockchip/rk3588s-lubancat-4.dts | 115 +++++++++++++++++- 1 file changed, 114 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts index 0d28c6165..a94aaddb2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-lubancat-4.dts @@ -8,9 +8,11 @@ /dts-v1/; #include +#include #include #include #include +#include #include "rk3588s.dtsi" / { @@ -116,6 +118,18 @@ vcc5v0_usb30_host: regulator-vcc5v0-usb30-host { vin-supply = <&vcc5v0_sys>; }; + vbus5v0_typec: regulator-vbus5v0-typec { + compatible = "regulator-fixed"; + regulator-name = "vbus5v0_typec"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec_vbus_en>; + vin-supply = <&vcc5v0_sys>; + }; + fan: pwm-fan { compatible = "pwm-fan"; cooling-levels = <0 100 150 200 255>; @@ -286,6 +300,51 @@ regulator-state-mem { regulator-off-in-suspend; }; }; + + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&fusb302_int>; + vbus-supply = <&vbus5v0_typec>; + status = "okay"; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "source"; + op-sink-microwatt = <1000000>; + sink-pdos = + ; + source-pdos = + ; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usbc0_hs: endpoint { + remote-endpoint = <&usb_host0_xhci_hs>; + }; + }; + + port@1 { + reg = <1>; + + usbc0_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_out>; + }; + }; + }; + }; + }; }; &mdio1 { @@ -346,6 +405,16 @@ usb30_host_pwr_en: usb30-host-pwr-en { rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb-typec { + fusb302_int: fusb302-int { + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + typec_vbus_en: typec-vbus-en { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pwm0 { @@ -748,8 +817,30 @@ &usb_host0_ohci { }; &usb_host0_xhci { - dr_mode = "host"; + dr_mode = "otg"; + usb-role-switch; status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_host0_xhci_hs: endpoint { + remote-endpoint = <&usbc0_hs>; + }; + }; + + port@1 { + reg = <1>; + + usb_host0_xhci_ss: endpoint { + remote-endpoint = <&usbdp_phy0_ss_in>; + }; + }; + }; }; &usb_host1_ehci { @@ -765,7 +856,29 @@ &usb_host2_xhci { }; &usbdp_phy0 { + orientation-switch; status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usbdp_phy0_ss_out: endpoint { + remote-endpoint = <&usbc0_ss>; + }; + }; + + port@1 { + reg = <1>; + + usbdp_phy0_ss_in: endpoint { + remote-endpoint = <&usb_host0_xhci_ss>; + }; + }; + }; }; &vop { -- 2.56.0