From: Jacky Huang <jackyhuang@nvidia.com>
To: <sashiko-reviews@lists.linux.dev>
Cc: <devicetree@vger.kernel.org>, <robh@kernel.org>,
<conor+dt@kernel.org>, Jacky Huang <jackyhuang@nvidia.com>
Subject: Re: [PATCH v2 2/2] ARM: dts: aspeed: Add NVIDIA MGX Vera C2 BMC
Date: Wed, 11 Nov 2026 15:49:41 +0800 [thread overview]
Message-ID: <20261111074106.fb5ad69cfbaa.c2-reply@nvidia.com> (raw)
In-Reply-To: <sashiko-outbox-195218@kernel.org>
> Is this framebuffer shared-dma-pool node intentionally left unreferenced?
This pool is reserved for future use. It is marked reusable, so unused
pages remain available for movable allocations.
> Does pinctrl_rmii3_default on &mac2 conflict with the gpio0 lines
> SGPIO_I2C_MUX_SEL-O (GPIOC0) and UART1_MUX_SEL-O (GPIOD3)?
H24 and E26 are not required for NC-SI on this platform. Their GPIO line
names are retained for potential future use.
Jacky
next prev parent reply other threads:[~2026-11-11 7:50 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 11:47 [PATCH v2 0/2] ARM: dts: aspeed: Add NVIDIA MGX Vera C2 BMC support Jacky Huang
2026-11-03 11:47 ` [PATCH v2 1/2] dt-bindings: arm: aspeed: Add NVIDIA MGX Vera C2 BMC Jacky Huang
2026-11-03 11:47 ` [PATCH v2 2/2] ARM: dts: " Jacky Huang
2026-11-03 12:09 ` sashiko-bot
2026-11-11 7:49 ` Jacky Huang [this message]
2026-11-09 6:24 ` Andrew Jeffery
2026-11-11 9:32 ` Jacky Huang
2026-11-11 23:29 ` Andrew Jeffery
2026-11-11 1:51 ` Andrew Lunn
2026-11-12 8:19 ` Jacky Huang
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