From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jonathan Cameron Subject: Re: [PATCH v2 2/7] iio: adc: stm32: Enable use of stm32 timer triggers Date: Sat, 28 Jan 2017 18:37:10 +0000 Message-ID: <20d7f143-c3fe-617c-7cee-82a222152bf7@kernel.org> References: <1485440915-30119-1-git-send-email-fabrice.gasnier@st.com> <1485440915-30119-3-git-send-email-fabrice.gasnier@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1485440915-30119-3-git-send-email-fabrice.gasnier-qxv4g6HH51o@public.gmane.org> Sender: linux-iio-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Fabrice Gasnier , linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, alexandre.torgue-qxv4g6HH51o@public.gmane.org, lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org, knaack.h-Mmb7MZpHnFY@public.gmane.org, pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org, benjamin.gaignard-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, benjamin.gaignard-qxv4g6HH51o@public.gmane.org List-Id: devicetree@vger.kernel.org On 26/01/17 14:28, Fabrice Gasnier wrote: > STM32 ADC has external timer trigger sources. Use stm32 timer triggers > API (e.g. is_stm32_timer_trigger()) with local ADC lookup table to > validate a trigger can be used. > This also provides correct trigger selection value (e.g. extsel). > > Signed-off-by: Fabrice Gasnier Applied to the togreg branch of iio.git. Thanks, Jonathan > --- > Changes in v2: > - Add comment on dual check to validate trigger (and get extsel) > --- > drivers/iio/adc/Kconfig | 2 ++ > drivers/iio/adc/stm32-adc.c | 65 +++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 67 insertions(+) > > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig > index 33341f4..9a7b090 100644 > --- a/drivers/iio/adc/Kconfig > +++ b/drivers/iio/adc/Kconfig > @@ -447,6 +447,8 @@ config STM32_ADC_CORE > depends on OF > depends on REGULATOR > select IIO_BUFFER > + select MFD_STM32_TIMERS > + select IIO_STM32_TIMER_TRIGGER > select IIO_TRIGGERED_BUFFER > help > Select this option to enable the core driver for STMicroelectronics > diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c > index 1e382b6..87d984b 100644 > --- a/drivers/iio/adc/stm32-adc.c > +++ b/drivers/iio/adc/stm32-adc.c > @@ -23,6 +23,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -81,6 +82,36 @@ enum stm32_adc_exten { > STM32_EXTEN_HWTRIG_BOTH_EDGES, > }; > > +/* extsel - trigger mux selection value */ > +enum stm32_adc_extsel { > + STM32_EXT0, > + STM32_EXT1, > + STM32_EXT2, > + STM32_EXT3, > + STM32_EXT4, > + STM32_EXT5, > + STM32_EXT6, > + STM32_EXT7, > + STM32_EXT8, > + STM32_EXT9, > + STM32_EXT10, > + STM32_EXT11, > + STM32_EXT12, > + STM32_EXT13, > + STM32_EXT14, > + STM32_EXT15, > +}; > + > +/** > + * struct stm32_adc_trig_info - ADC trigger info > + * @name: name of the trigger, corresponding to its source > + * @extsel: trigger selection > + */ > +struct stm32_adc_trig_info { > + const char *name; > + enum stm32_adc_extsel extsel; > +}; > + > /** > * stm32_adc_regs - stm32 ADC misc registers & bitfield desc > * @reg: register offset > @@ -176,6 +207,26 @@ struct stm32_adc_chan_spec { > { STM32F4_ADC_SQR1, GENMASK(19, 15), 15 }, > }; > > +/* STM32F4 external trigger sources for all instances */ > +static struct stm32_adc_trig_info stm32f4_adc_trigs[] = { > + { TIM1_CH1, STM32_EXT0 }, > + { TIM1_CH2, STM32_EXT1 }, > + { TIM1_CH3, STM32_EXT2 }, > + { TIM2_CH2, STM32_EXT3 }, > + { TIM2_CH3, STM32_EXT4 }, > + { TIM2_CH4, STM32_EXT5 }, > + { TIM2_TRGO, STM32_EXT6 }, > + { TIM3_CH1, STM32_EXT7 }, > + { TIM3_TRGO, STM32_EXT8 }, > + { TIM4_CH4, STM32_EXT9 }, > + { TIM5_CH1, STM32_EXT10 }, > + { TIM5_CH2, STM32_EXT11 }, > + { TIM5_CH3, STM32_EXT12 }, > + { TIM8_CH1, STM32_EXT13 }, > + { TIM8_TRGO, STM32_EXT14 }, > + {}, /* sentinel */ > +}; > + > /** > * STM32 ADC registers access routines > * @adc: stm32 adc instance > @@ -318,6 +369,20 @@ static int stm32_adc_conf_scan_seq(struct iio_dev *indio_dev, > */ > static int stm32_adc_get_trig_extsel(struct iio_trigger *trig) > { > + int i; > + > + /* lookup triggers registered by stm32 timer trigger driver */ > + for (i = 0; stm32f4_adc_trigs[i].name; i++) { > + /** > + * Checking both stm32 timer trigger type and trig name > + * should be safe against arbitrary trigger names. > + */ > + if (is_stm32_timer_trigger(trig) && > + !strcmp(stm32f4_adc_trigs[i].name, trig->name)) { > + return stm32f4_adc_trigs[i].extsel; > + } > + } > + > return -EINVAL; > } > >