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Mon, 03 Nov 2025 03:33:59 -0800 (PST) Message-ID: <20e485b69419ffd518c7aeb16881df429b0a4873.camel@gmail.com> Subject: Re: [PATCH v2 2/4] iio: adc: Add support for the Renesas RZ/N1 ADC From: Nuno =?ISO-8859-1?Q?S=E1?= To: "Herve Codina (Schneider Electric)" , Wolfram Sang , Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Liam Girdwood , Mark Brown Cc: linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Date: Mon, 03 Nov 2025 11:34:35 +0000 In-Reply-To: <20251029144644.667561-3-herve.codina@bootlin.com> References: <20251029144644.667561-1-herve.codina@bootlin.com> <20251029144644.667561-3-herve.codina@bootlin.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2025-10-29 at 15:46 +0100, Herve Codina (Schneider Electric) wrote: > The Renesas RZ/N1 ADC controller is the ADC controller available in the > Renesas RZ/N1 SoCs family. It can use up to two internal ADC cores (ADC1 > and ADC2) those internal cores are not directly accessed but are handled > through ADC controller virtual channels. >=20 > Signed-off-by: Herve Codina (Schneider Electric) > --- Not much to add to Andy's review. Looks in good shape... Just one small rem= ark from me. With it and Andy's stuff addressed: Reviewed-by: Nuno S=C3=A1 > =C2=A0drivers/iio/adc/Kconfig=C2=A0=C2=A0=C2=A0 |=C2=A0 10 + > =C2=A0drivers/iio/adc/Makefile=C2=A0=C2=A0 |=C2=A0=C2=A0 1 + > =C2=A0drivers/iio/adc/rzn1-adc.c | 493 ++++++++++++++++++++++++++++++++++= +++ > =C2=A03 files changed, 504 insertions(+) > =C2=A0create mode 100644 drivers/iio/adc/rzn1-adc.c >=20 > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig > index 58a14e6833f6..113f6a5c9745 100644 > --- a/drivers/iio/adc/Kconfig > +++ b/drivers/iio/adc/Kconfig > @@ -1403,6 +1403,16 @@ config RZG2L_ADC > =C2=A0 =C2=A0 To compile this driver as a module, choose M here: the > =C2=A0 =C2=A0 module will be called rzg2l_adc. > =C2=A0 > +config RZN1_ADC > + tristate "Renesas RZ/N1 ADC driver" > + depends on ARCH_RZN1 || COMPILE_TEST > + help > + =C2=A0 Say yes here to build support for the ADC found in Renesas > + =C2=A0 RZ/N1 family. > + > + =C2=A0 To compile this driver as a module, choose M here: the > + =C2=A0 module will be called rzn1-adc. > + > =C2=A0config SC27XX_ADC > =C2=A0 tristate "Spreadtrum SC27xx series PMICs ADC" > =C2=A0 depends on MFD_SC27XX_PMIC || COMPILE_TEST > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile > index d008f78dc010..ba7a8a63d070 100644 > --- a/drivers/iio/adc/Makefile > +++ b/drivers/iio/adc/Makefile > @@ -123,6 +123,7 @@ obj-$(CONFIG_ROHM_BD79112) +=3D rohm-bd79112.o > =C2=A0obj-$(CONFIG_ROHM_BD79124) +=3D rohm-bd79124.o > =C2=A0obj-$(CONFIG_ROCKCHIP_SARADC) +=3D rockchip_saradc.o > =C2=A0obj-$(CONFIG_RZG2L_ADC) +=3D rzg2l_adc.o > +obj-$(CONFIG_RZN1_ADC) +=3D rzn1-adc.o > =C2=A0obj-$(CONFIG_SC27XX_ADC) +=3D sc27xx_adc.o > =C2=A0obj-$(CONFIG_SD_ADC_MODULATOR) +=3D sd_adc_modulator.o > =C2=A0obj-$(CONFIG_SOPHGO_CV1800B_ADC) +=3D sophgo-cv1800b-adc.o > diff --git a/drivers/iio/adc/rzn1-adc.c b/drivers/iio/adc/rzn1-adc.c > new file mode 100644 > index 000000000000..52ec13adddef > --- /dev/null > +++ b/drivers/iio/adc/rzn1-adc.c > @@ -0,0 +1,493 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Renesas RZ/N1 ADC driver > + * > + * Copyright (C) 2025 Schneider-Electric > + * > + * Author: Herve Codina > + * > + * The RZ/N1 ADC controller can handle channels from its internal ADC1 a= nd/or > + * ADC2 cores. The driver use ADC1 and/or ADC2 cores depending on the pr= esence > + * of the related power supplies (AVDD and VREF) description in the devi= ce-tree. > + */ ... >=20 > + > + platform_set_drvdata(pdev, indio_dev); > + If I'm not missing nothing, there's no real need to pass in indio_dev. So, = why not passing rzn1_adc directly and avoid the pointer arithmetic's in the pm call= backs? - Nuno S=C3=A1