[PATCH 00/13] Another round of K3 DTSI disables

[PATCH 00/13] Another round of K3 DTSI disables

[Andrew Davis]

Hello all,

Similar to a couple previous series on this, we disable by default
nodes that cannot function standalone.

This helps prevent folks from forgetting to disable unused nodes
in their boards. One benefit of that is you can start out with
an almost empty DTS file for a new board and have it still
function without warnings or misbehaving hardware. Adding as you
go, this helps ease bringup and upstreaming of new boards.

Thanks,
Andrew 

Andrew Davis (13):
  arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level
  arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level
  arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level
  arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level
  arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level
  arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level
  arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level
  arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level
  arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level
  arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
  arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
  arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level

 arch/arm64/boot/dts/ti/k3-am64-main.dtsi      |  2 +
 .../boot/dts/ti/k3-am64-phycore-som.dtsi      |  1 +
 arch/arm64/boot/dts/ti/k3-am642-evm.dts       |  1 +
 arch/arm64/boot/dts/ti/k3-am642-sk.dts        |  5 +-
 .../boot/dts/ti/k3-am65-iot2050-common.dtsi   |  6 +-
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi       |  4 ++
 .../arm64/boot/dts/ti/k3-am654-base-board.dts |  3 +
 .../boot/dts/ti/k3-am68-sk-base-board.dts     | 24 +-------
 .../dts/ti/k3-j7200-common-proc-board.dts     | 20 ++----
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi     |  6 ++
 .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      |  3 +
 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi   |  1 +
 .../boot/dts/ti/k3-j721e-beagleboneai64.dts   | 61 ++++---------------
 .../dts/ti/k3-j721e-common-proc-board.dts     | 44 ++++---------
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 11 ++++
 .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      |  6 ++
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts        | 58 +++---------------
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi   |  1 +
 .../dts/ti/k3-j721s2-common-proc-board.dts    | 20 +++---
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi    |  6 ++
 .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi     |  2 +
 21 files changed, 98 insertions(+), 187 deletions(-)

-- 
2.39.2

[PATCH 01/13] arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level

[Andrew Davis]

SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts    |  7 ++-----
 arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts |  7 ++-----
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi             |  3 +++
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts                | 11 +----------
 4 files changed, 8 insertions(+), 20 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 66aac145e7530..64eed76bbb7a3 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -563,6 +563,7 @@ &main_uart0 {
 
 &main_sdhci0 {
 	/* eMMC */
+	status = "okay";
 	non-removable;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
@@ -570,6 +571,7 @@ &main_sdhci0 {
 
 &main_sdhci1 {
 	/* SD Card */
+	status = "okay";
 	vmmc-supply = <&vdd_mmc1>;
 	vqmmc-supply = <&vdd_sd_dv_alt>;
 	pinctrl-names = "default";
@@ -578,11 +580,6 @@ &main_sdhci1 {
 	disable-wp;
 };
 
-&main_sdhci2 {
-	/* Unused */
-	status = "disabled";
-};
-
 &ospi0 {
 	/* Unused */
 	status = "disabled";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index c1cbbae761827..e9b84d2c64b26 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -504,6 +504,7 @@ &wkup_gpio1 {
 
 &main_sdhci0 {
 	/* eMMC */
+	status = "okay";
 	non-removable;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
@@ -511,6 +512,7 @@ &main_sdhci0 {
 
 &main_sdhci1 {
 	/* SD/MMC */
+	status = "okay";
 	vmmc-supply = <&vdd_mmc1>;
 	vqmmc-supply = <&vdd_sd_dv_alt>;
 	pinctrl-names = "default";
@@ -519,11 +521,6 @@ &main_sdhci1 {
 	disable-wp;
 };
 
-&main_sdhci2 {
-	/* Unused */
-	status = "disabled";
-};
-
 &usb_serdes_mux {
 	idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
 };
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 3acd55ffd4ffc..0ca31186b9b74 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1478,6 +1478,7 @@ main_sdhci0: mmc@4f80000 {
 		ti,itap-del-sel-ddr52 = <0x3>;
 		ti,trm-icp = <0x8>;
 		dma-coherent;
+		status = "disabled";
 	};
 
 	main_sdhci1: mmc@4fb0000 {
@@ -1505,6 +1506,7 @@ main_sdhci1: mmc@4fb0000 {
 		ti,clkbuf-sel = <0x7>;
 		dma-coherent;
 		sdhci-caps-mask = <0x2 0x0>;
+		status = "disabled";
 	};
 
 	main_sdhci2: mmc@4f98000 {
@@ -1532,6 +1534,7 @@ main_sdhci2: mmc@4f98000 {
 		ti,clkbuf-sel = <0x7>;
 		dma-coherent;
 		sdhci-caps-mask = <0x2 0x0>;
+		status = "disabled";
 	};
 
 	usbss0: cdns-usb@4104000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 0ee4f38ec8f03..bd1bd1b746056 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -582,13 +582,9 @@ &main_uart1 {
 	pinctrl-0 = <&main_uart1_pins_default>;
 };
 
-&main_sdhci0 {
-	/* Unused */
-	status = "disabled";
-};
-
 &main_sdhci1 {
 	/* SD Card */
+	status = "okay";
 	vmmc-supply = <&vdd_mmc1>;
 	vqmmc-supply = <&vdd_sd_dv_alt>;
 	pinctrl-names = "default";
@@ -597,11 +593,6 @@ &main_sdhci1 {
 	disable-wp;
 };
 
-&main_sdhci2 {
-	/* Unused */
-	status = "disabled";
-};
-
 &ospi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
-- 
2.39.2

[PATCH 02/13] arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level

[Andrew Davis]

SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 ++
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi             | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 92a5414911729..dee9056f56051 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -326,6 +326,7 @@ exp3: gpio@20 {
 
 &main_sdhci0 {
 	/* eMMC */
+	status = "okay";
 	non-removable;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
@@ -333,6 +334,7 @@ &main_sdhci0 {
 
 &main_sdhci1 {
 	/* SD card */
+	status = "okay";
 	pinctrl-0 = <&main_mmc1_pins_default>;
 	pinctrl-names = "default";
 	vmmc-supply = <&vdd_mmc1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 6eaade5aeb423..5d7542ba41b93 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -654,6 +654,7 @@ main_sdhci0: mmc@4f80000 {
 		mmc-hs200-1_8v;
 		mmc-hs400-1_8v;
 		dma-coherent;
+		status = "disabled";
 	};
 
 	main_sdhci1: mmc@4fb0000 {
@@ -677,6 +678,7 @@ main_sdhci1: mmc@4fb0000 {
 		ti,clkbuf-sel = <0x7>;
 		ti,trm-icp = <0x8>;
 		dma-coherent;
+		status = "disabled";
 	};
 
 	serdes_wiz0: wiz@5060000 {
-- 
2.39.2

[PATCH 03/13] arm64: dts: ti: k3-j721s2: Enable SDHCI nodes at the board level

[Andrew Davis]

SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts       | 6 +-----
 arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 2 ++
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi             | 2 ++
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 21ad49cfa7eed..ffca12df0a6da 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -373,13 +373,9 @@ &mcu_i2c0 {
 	clock-frequency = <400000>;
 };
 
-&main_sdhci0 {
-	/* Unused */
-	status = "disabled";
-};
-
 &main_sdhci1 {
 	/* SD card */
+	status = "okay";
 	pinctrl-0 = <&main_mmc1_pins_default>;
 	pinctrl-names = "default";
 	disable-wp;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index 02b7a559bdf21..3a8e6eb402448 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -333,6 +333,7 @@ exp2: gpio@22 {
 
 &main_sdhci0 {
 	/* eMMC */
+	status = "okay";
 	non-removable;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
@@ -340,6 +341,7 @@ &main_sdhci0 {
 
 &main_sdhci1 {
 	/* SD card */
+	status = "okay";
 	pinctrl-0 = <&main_mmc1_pins_default>;
 	pinctrl-names = "default";
 	disable-wp;
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index ed79ab3a32718..c46079fe4ed6e 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -665,6 +665,7 @@ main_sdhci0: mmc@4f80000 {
 		mmc-hs200-1_8v;
 		mmc-hs400-1_8v;
 		dma-coherent;
+		status = "disabled";
 	};
 
 	main_sdhci1: mmc@4fb0000 {
@@ -694,6 +695,7 @@ main_sdhci1: mmc@4fb0000 {
 		dma-coherent;
 		/* Masking support for SDR104 capability */
 		sdhci-caps-mask = <0x00000003 0x00000000>;
+		status = "disabled";
 	};
 
 	main_navss: bus@30000000 {
-- 
2.39.2

[PATCH 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

[Andrew Davis]

OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 +
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
 arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 1 +
 3 files changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index e26bd988e5224..6041862d5aa75 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -593,6 +593,7 @@ adc {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 7b1f94a89eca8..2c9c20a9d9179 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -295,6 +295,7 @@ ospi0: spi@47040000 {
 			power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};
 
 		ospi1: spi@47050000 {
@@ -309,6 +310,7 @@ ospi1: spi@47050000 {
 			power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 973a89b04a22f..43de7c132d343 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -530,6 +530,7 @@ &mcu_r5fss0_core1 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 
-- 
2.39.2

[PATCH 05/13] arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level

[Andrew Davis]

OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 10 ----------
 arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi    |  2 ++
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts             |  6 +-----
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi        |  1 +
 4 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 64eed76bbb7a3..0b89977351c98 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -580,16 +580,6 @@ &main_sdhci1 {
 	disable-wp;
 };
 
-&ospi0 {
-	/* Unused */
-	status = "disabled";
-};
-
-&ospi1 {
-	/* Unused */
-	status = "disabled";
-};
-
 &main_i2c0 {
 	status = "okay";
 	pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index c1b6f8d7d1898..0c01bdd9656f1 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -378,6 +378,7 @@ ospi0: spi@47040000 {
 			power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};
 
 		ospi1: spi@47050000 {
@@ -392,6 +393,7 @@ ospi1: spi@47050000 {
 			power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index bd1bd1b746056..4cd5346f2dd59 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -594,6 +594,7 @@ &main_sdhci1 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 
@@ -657,11 +658,6 @@ partition@3fc0000 {
 	};
 };
 
-&ospi1 {
-	/* Unused */
-	status = "disabled";
-};
-
 &main_i2c0 {
 	status = "okay";
 	pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index e90e43202546e..928d3a8ad2d09 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -202,6 +202,7 @@ eeprom@50 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 
-- 
2.39.2

[PATCH 06/13] arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level

[Andrew Davis]

OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 1 +
 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index ee7860913c387..571eb0e2eac92 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -544,6 +544,7 @@ ospi0: spi@47040000 {
 			power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index b37f4f88ece4f..5a300d4c8ba03 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -267,6 +267,7 @@ eeprom@50 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 
-- 
2.39.2

[PATCH 07/13] arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level

[Andrew Davis]

OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi        | 1 +
 arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 1 +
 arch/arm64/boot/dts/ti/k3-am642-evm.dts         | 1 +
 arch/arm64/boot/dts/ti/k3-am642-sk.dts          | 1 +
 4 files changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index d3dd8c426dada..49f910e4b03fc 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -802,6 +802,7 @@ ospi0: spi@fc40000 {
 			assigned-clock-parents = <&k3_clks 75 7>;
 			assigned-clock-rates = <166666666>;
 			power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
+			status = "disabled";
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 5606d775153d4..1c2c8f0daca9f 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -181,6 +181,7 @@ i2c_som_rtc: rtc@52 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&ospi0_pins_default>;
 
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index d84e7ee160328..b4a1f73d4fb17 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -520,6 +520,7 @@ &tscadc0 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&ospi0_pins_default>;
 
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 963d796a3a970..af06ccd466802 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -518,6 +518,7 @@ &tscadc0 {
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&ospi0_pins_default>;
 
-- 
2.39.2

[PATCH 08/13] arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level

[Andrew Davis]

GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 .../boot/dts/ti/k3-j721e-beagleboneai64.dts   | 42 ++++---------------
 .../dts/ti/k3-j721e-common-proc-board.dts     | 35 ++++------------
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     |  8 ++++
 .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      |  2 +
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts        | 31 +++-----------
 5 files changed, 31 insertions(+), 87 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 0b89977351c98..99536765939d9 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -647,52 +647,24 @@ eeprom@50 {
 	};
 };
 
-&main_gpio2 {
-	/* Unused */
-	status = "disabled";
-};
-
-&main_gpio3 {
-	/* Unused */
-	status = "disabled";
-};
-
-&main_gpio4 {
-	/* Unused */
-	status = "disabled";
-};
-
-&main_gpio5 {
-	/* Unused */
-	status = "disabled";
-};
-
-&main_gpio6 {
-	/* Unused */
-	status = "disabled";
-};
-
-&main_gpio7 {
-	/* Unused */
-	status = "disabled";
-};
-
 &wkup_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_adc0_pins_default>, <&mcu_adc1_pins_default>,
 		    <&mikro_bus_pins_default>;
 };
 
-&wkup_gpio1 {
-	/* Unused */
-	status = "disabled";
-};
-
 &main_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&csi1_gpio_pins_default>, <&csi0_gpio_pins_default>;
 };
 
+&main_gpio1 {
+	status = "okay";
+	/* default pins */
+};
+
 &usb_serdes_mux {
 	idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
 };
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index e9b84d2c64b26..2fd940893eb5f 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -469,37 +469,20 @@ &main_uart4 {
 	pinctrl-0 = <&main_uart4_pins_default>;
 };
 
-&main_gpio2 {
-	status = "disabled";
-};
-
-&main_gpio3 {
-	status = "disabled";
-};
-
-&main_gpio4 {
-	status = "disabled";
-};
-
-&main_gpio5 {
-	status = "disabled";
-};
-
-&main_gpio6 {
-	status = "disabled";
-};
-
-&main_gpio7 {
-	status = "disabled";
-};
-
 &wkup_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&wkup_gpio_pins_default>;
 };
 
-&wkup_gpio1 {
-	status = "disabled";
+&main_gpio0 {
+	status = "okay";
+	/* default pins */
+};
+
+&main_gpio1 {
+	status = "okay";
+	/* default pins */
 };
 
 &main_sdhci0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 0ca31186b9b74..7f663d9280b57 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1339,6 +1339,7 @@ main_gpio0: gpio@600000 {
 		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 105 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio1: gpio@601000 {
@@ -1355,6 +1356,7 @@ main_gpio1: gpio@601000 {
 		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 106 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio2: gpio@610000 {
@@ -1372,6 +1374,7 @@ main_gpio2: gpio@610000 {
 		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 107 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio3: gpio@611000 {
@@ -1388,6 +1391,7 @@ main_gpio3: gpio@611000 {
 		power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 108 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio4: gpio@620000 {
@@ -1405,6 +1409,7 @@ main_gpio4: gpio@620000 {
 		power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 109 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio5: gpio@621000 {
@@ -1421,6 +1426,7 @@ main_gpio5: gpio@621000 {
 		power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 110 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio6: gpio@630000 {
@@ -1438,6 +1444,7 @@ main_gpio6: gpio@630000 {
 		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 111 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio7: gpio@631000 {
@@ -1454,6 +1461,7 @@ main_gpio7: gpio@631000 {
 		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 112 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_sdhci0: mmc@4f80000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 0c01bdd9656f1..4d107eee9b341 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -281,6 +281,7 @@ wkup_gpio0: gpio@42110000 {
 		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 113 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	wkup_gpio1: gpio@42100000 {
@@ -297,6 +298,7 @@ wkup_gpio1: gpio@42100000 {
 		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 114 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	mcu_i2c0: i2c@40b00000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 4cd5346f2dd59..dfb6af60482e7 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -731,41 +731,20 @@ &main_i2c5 {
 };
 
 &main_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rpi_header_gpio0_pins_default>;
 };
 
 &main_gpio1 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rpi_header_gpio1_pins_default>;
 };
 
-&main_gpio2 {
-	status = "disabled";
-};
-
-&main_gpio3 {
-	status = "disabled";
-};
-
-&main_gpio4 {
-	status = "disabled";
-};
-
-&main_gpio5 {
-	status = "disabled";
-};
-
-&main_gpio6 {
-	status = "disabled";
-};
-
-&main_gpio7 {
-	status = "disabled";
-};
-
-&wkup_gpio1 {
-	status = "disabled";
+&wkup_gpio0 {
+	status = "okay";
+	/* default pins */
 };
 
 &usb_serdes_mux {
-- 
2.39.2

[PATCH 09/13] arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level

[Andrew Davis]

GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 .../boot/dts/ti/k3-am68-sk-base-board.dts      | 18 ++----------------
 .../dts/ti/k3-j721s2-common-proc-board.dts     | 18 ++++++------------
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi     |  4 ++++
 .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi      |  2 ++
 4 files changed, 14 insertions(+), 28 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index ffca12df0a6da..4c855dffb4cd2 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -297,31 +297,17 @@ J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
 };
 
 &main_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rpi_header_gpio0_pins_default>;
 };
 
-&main_gpio2 {
-	status = "disabled";
-};
-
-&main_gpio4 {
-	status = "disabled";
-};
-
-&main_gpio6 {
-	status = "disabled";
-};
-
 &wkup_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
 };
 
-&wkup_gpio1 {
-	status = "disabled";
-};
-
 &wkup_uart0 {
 	status = "reserved";
 	pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index 3a8e6eb402448..6f248d27a30a4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -266,20 +266,14 @@ J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
 	};
 };
 
-&main_gpio2 {
-	status = "disabled";
-};
-
-&main_gpio4 {
-	status = "disabled";
-};
-
-&main_gpio6 {
-	status = "disabled";
+&main_gpio0 {
+	status = "okay";
+	/* default pins */
 };
 
-&wkup_gpio1 {
-	status = "disabled";
+&wkup_gpio0 {
+	status = "okay";
+	/* default pins */
 };
 
 &wkup_uart0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index c46079fe4ed6e..0cc8057fce13c 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -507,6 +507,7 @@ main_gpio0: gpio@600000 {
 		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 111 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio2: gpio@610000 {
@@ -523,6 +524,7 @@ main_gpio2: gpio@610000 {
 		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 112 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio4: gpio@620000 {
@@ -539,6 +541,7 @@ main_gpio4: gpio@620000 {
 		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 113 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio6: gpio@630000 {
@@ -555,6 +558,7 @@ main_gpio6: gpio@630000 {
 		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 114 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_i2c0: i2c@2000000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 736ec5fa0ea28..3557f3338377d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -323,6 +323,7 @@ wkup_gpio0: gpio@42110000 {
 		power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 115 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	wkup_gpio1: gpio@42100000 {
@@ -339,6 +340,7 @@ wkup_gpio1: gpio@42100000 {
 		power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 116 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	wkup_i2c0: i2c@42120000 {
-- 
2.39.2

[PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

[Andrew Davis]

GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi      |  4 ++++
 .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  2 ++
 3 files changed, 10 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index dee9056f56051..4a5c4f36baeec 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -240,27 +240,17 @@ &main_uart3 {
 	pinctrl-0 = <&main_uart3_pins_default>;
 };
 
-&main_gpio2 {
-	status = "disabled";
-};
-
-&main_gpio4 {
-	status = "disabled";
-};
-
-&main_gpio6 {
-	status = "disabled";
+&main_gpio0 {
+	status = "okay";
+	/* default pins */
 };
 
 &wkup_gpio0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&wkup_gpio_pins_default>;
 };
 
-&wkup_gpio1 {
-	status = "disabled";
-};
-
 &mcu_cpsw {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 5d7542ba41b93..6a776f3bbcb19 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -832,6 +832,7 @@ main_gpio0: gpio@600000 {
 		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 105 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio2: gpio@610000 {
@@ -849,6 +850,7 @@ main_gpio2: gpio@610000 {
 		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 107 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio4: gpio@620000 {
@@ -866,6 +868,7 @@ main_gpio4: gpio@620000 {
 		power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 109 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_gpio6: gpio@630000 {
@@ -883,6 +886,7 @@ main_gpio6: gpio@630000 {
 		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 111 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	main_spi0: spi@2100000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 571eb0e2eac92..5ae7320efad7b 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -297,6 +297,7 @@ wkup_gpio0: gpio@42110000 {
 		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 113 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	wkup_gpio1: gpio@42100000 {
@@ -313,6 +314,7 @@ wkup_gpio1: gpio@42100000 {
 		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 114 0>;
 		clock-names = "gpio";
+		status = "disabled";
 	};
 
 	mcu_navss: bus@28380000 {
-- 
2.39.2

[PATCH 11/13] arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level

[Andrew Davis]

TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts    |  2 ++
 arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts |  2 ++
 arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi       |  2 ++
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts                | 10 ----------
 4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 99536765939d9..79245a85d7c69 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -748,6 +748,7 @@ &usb1 {
 };
 
 &tscadc0 {
+	status = "okay";
 	/* BBB Header: P9.39, P9.40, P9.37, P9.38, P9.33, P9.36, P9.35 */
 	adc {
 		ti,adc-channels = <0 1 2 3 4 5 6>;
@@ -755,6 +756,7 @@ adc {
 };
 
 &tscadc1 {
+	status = "okay";
 	/* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */
 	adc {
 		ti,adc-channels = <0>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 2fd940893eb5f..6cea309fc247a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -621,12 +621,14 @@ partition@3fe0000 {
 };
 
 &tscadc0 {
+	status = "okay";
 	adc {
 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
 	};
 };
 
 &tscadc1 {
+	status = "okay";
 	adc {
 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
 	};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 4d107eee9b341..37a8c80de3bc5 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -411,6 +411,7 @@ tscadc0: tscadc@40200000 {
 		dmas = <&main_udmap 0x7400>,
 			<&main_udmap 0x7401>;
 		dma-names = "fifo0", "fifo1";
+		status = "disabled";
 
 		adc {
 			#io-channel-cells = <1>;
@@ -430,6 +431,7 @@ tscadc1: tscadc@40210000 {
 		dmas = <&main_udmap 0x7402>,
 			<&main_udmap 0x7403>;
 		dma-names = "fifo0", "fifo1";
+		status = "disabled";
 
 		adc {
 			#io-channel-cells = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index dfb6af60482e7..ca5be7797a02b 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -829,16 +829,6 @@ &usb1 {
 	phy-names = "cdns3,usb3-phy";
 };
 
-&tscadc0 {
-	/* Unused */
-	status = "disabled";
-};
-
-&tscadc1 {
-	/* Unused */
-	status = "disabled";
-};
-
 &mcu_cpsw {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
-- 
2.39.2

[PATCH 12/13] arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level

[Andrew Davis]

TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 5 +----
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
 arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 2 ++
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index 6041862d5aa75..ba1c14a54acf4 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -582,11 +582,8 @@ &mcu_spi0 {
 	ti,pindir-d0-out-d1-in;
 };
 
-&tscadc0 {
-	status = "disabled";
-};
-
 &tscadc1 {
+	status = "okay";
 	adc {
 		ti,adc-channels = <0 1 2 3 4 5>;
 	};
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 2c9c20a9d9179..4defde540fe0b 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -112,6 +112,7 @@ tscadc0: tscadc@40200000 {
 		dmas = <&mcu_udmap 0x7100>,
 			<&mcu_udmap 0x7101 >;
 		dma-names = "fifo0", "fifo1";
+		status = "disabled";
 
 		adc {
 			#io-channel-cells = <1>;
@@ -130,6 +131,7 @@ tscadc1: tscadc@40210000 {
 		dmas = <&mcu_udmap 0x7102>,
 			<&mcu_udmap 0x7103>;
 		dma-names = "fifo0", "fifo1";
+		status = "disabled";
 
 		adc {
 			#io-channel-cells = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 43de7c132d343..17f45a9f7b146 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -478,12 +478,14 @@ &usb0_phy {
 };
 
 &tscadc0 {
+	status = "okay";
 	adc {
 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
 	};
 };
 
 &tscadc1 {
+	status = "okay";
 	adc {
 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
 	};
-- 
2.39.2

[PATCH 13/13] arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level

[Andrew Davis]

TSCADC nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 +
 arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 4 ----
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 49f910e4b03fc..a9db9b6d03aca 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -773,6 +773,7 @@ tscadc0: tscadc@28001000 {
 		assigned-clock-parents = <&k3_clks 0 3>;
 		assigned-clock-rates = <60000000>;
 		clock-names = "fck";
+		status = "disabled";
 
 		adc {
 			#io-channel-cells = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index af06ccd466802..722fd285a34ec 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -513,10 +513,6 @@ cpsw3g_phy1: ethernet-phy@1 {
 	};
 };
 
-&tscadc0 {
-	status = "disabled";
-};
-
 &ospi0 {
 	status = "okay";
 	pinctrl-names = "default";
-- 
2.39.2

Re: [PATCH 07/13] arm64: dts: ti: k3-am64: Enable OSPI nodes at the board level

[Dhruva Gole]

On 03/08/23 02:23, Andrew Davis wrote:
> OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and
> device information.
> 
> As the attached OSPI device is only known about at the board integration
> level, these nodes should only be enabled when provided with this
> information.
> 
> Disable the OSPI nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am64-main.dtsi        | 1 +
>   arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 1 +
>   arch/arm64/boot/dts/ti/k3-am642-evm.dts         | 1 +
>   arch/arm64/boot/dts/ti/k3-am642-sk.dts          | 1 +
>   4 files changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index d3dd8c426dada..49f910e4b03fc 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -802,6 +802,7 @@ ospi0: spi@fc40000 {
>   			assigned-clock-parents = <&k3_clks 75 7>;
>   			assigned-clock-rates = <166666666>;
>   			power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
> +			status = "disabled";
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> index 5606d775153d4..1c2c8f0daca9f 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> @@ -181,6 +181,7 @@ i2c_som_rtc: rtc@52 {
>   };
>   
>   &ospi0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&ospi0_pins_default>;
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> index d84e7ee160328..b4a1f73d4fb17 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> @@ -520,6 +520,7 @@ &tscadc0 {
>   };
>   
>   &ospi0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&ospi0_pins_default>;
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> index 963d796a3a970..af06ccd466802 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> @@ -518,6 +518,7 @@ &tscadc0 {
>   };
>   
>   &ospi0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&ospi0_pins_default>;
>   

Reviewed-by: Dhruva Gole <d-gole@ti.com>


-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 06/13] arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level

[Dhruva Gole]

On 03/08/23 02:23, Andrew Davis wrote:
> OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and
> device information.
> 
> As the attached OSPI device is only known about at the board integration
> level, these nodes should only be enabled when provided with this
> information.

Agree

> 
> Disable the OSPI nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 1 +
>   arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi     | 1 +
>   2 files changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index ee7860913c387..571eb0e2eac92 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -544,6 +544,7 @@ ospi0: spi@47040000 {
>   			power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
>   			#address-cells = <1>;
>   			#size-cells = <0>;
> +			status = "disabled";
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index b37f4f88ece4f..5a300d4c8ba03 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -267,6 +267,7 @@ eeprom@50 {
>   };
>   
>   &ospi0 {
> +	status = "okay";

Reviewed-by: Dhruva Gole <d-gole@ti.com>

>   	pinctrl-names = "default";
>   	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
>   

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 01/13] arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level

[Dhruva Gole]

On 03/08/23 02:22, Andrew Davis wrote:
> SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete
> and will not be functional unless they are extended.
> 
> As the attached SD/eMMC is only known about at the board integration level,
> these nodes should only be enabled when provided with this information.
> 
> Disable the SDHCI nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts    |  7 ++-----
>   arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts |  7 ++-----
>   arch/arm64/boot/dts/ti/k3-j721e-main.dtsi             |  3 +++
>   arch/arm64/boot/dts/ti/k3-j721e-sk.dts                | 11 +----------
>   4 files changed, 8 insertions(+), 20 deletions(-)
> 
[snip]

Reviewed-by: Dhruva Gole <d-gole@ti.com>

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 08/13] arm64: dts: ti: k3-j721e: Enable GPIO nodes at the board level

[Dhruva Gole]

On 03/08/23 02:23, Andrew Davis wrote:
> GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and
> device information.
> 
> Disable the GPIO nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   .../boot/dts/ti/k3-j721e-beagleboneai64.dts   | 42 ++++---------------
>   .../dts/ti/k3-j721e-common-proc-board.dts     | 35 ++++------------
>   arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     |  8 ++++
>   .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      |  2 +
>   arch/arm64/boot/dts/ti/k3-j721e-sk.dts        | 31 +++-----------
>   5 files changed, 31 insertions(+), 87 deletions(-)
> 

Reviewed-by: Dhruva Gole <d-gole@ti.com>

> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> index 0b89977351c98..99536765939d9 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> @@ -647,52 +647,24 @@ eeprom@50 {
>   	};
>   };
>   
> -&main_gpio2 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
> -&main_gpio3 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
> -&main_gpio4 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
> -&main_gpio5 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
> -&main_gpio6 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
> -&main_gpio7 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
>   &wkup_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&mcu_adc0_pins_default>, <&mcu_adc1_pins_default>,
>   		    <&mikro_bus_pins_default>;
>   };
>   
> -&wkup_gpio1 {
> -	/* Unused */
> -	status = "disabled";
> -};
> -
>   &main_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&csi1_gpio_pins_default>, <&csi0_gpio_pins_default>;
>   };
>   
> +&main_gpio1 {
> +	status = "okay";
> +	/* default pins */
> +};
> +
>   &usb_serdes_mux {
>   	idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
>   };
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> index e9b84d2c64b26..2fd940893eb5f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> @@ -469,37 +469,20 @@ &main_uart4 {
>   	pinctrl-0 = <&main_uart4_pins_default>;
>   };
>   
> -&main_gpio2 {
> -	status = "disabled";
> -};
> -
> -&main_gpio3 {
> -	status = "disabled";
> -};
> -
> -&main_gpio4 {
> -	status = "disabled";
> -};
> -
> -&main_gpio5 {
> -	status = "disabled";
> -};
> -
> -&main_gpio6 {
> -	status = "disabled";
> -};
> -
> -&main_gpio7 {
> -	status = "disabled";
> -};
> -
>   &wkup_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&wkup_gpio_pins_default>;
>   };
>   
> -&wkup_gpio1 {
> -	status = "disabled";
> +&main_gpio0 {
> +	status = "okay";
> +	/* default pins */
> +};
> +
> +&main_gpio1 {
> +	status = "okay";
> +	/* default pins */
>   };
>   
>   &main_sdhci0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 0ca31186b9b74..7f663d9280b57 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1339,6 +1339,7 @@ main_gpio0: gpio@600000 {
>   		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 105 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio1: gpio@601000 {
> @@ -1355,6 +1356,7 @@ main_gpio1: gpio@601000 {
>   		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 106 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio2: gpio@610000 {
> @@ -1372,6 +1374,7 @@ main_gpio2: gpio@610000 {
>   		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 107 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio3: gpio@611000 {
> @@ -1388,6 +1391,7 @@ main_gpio3: gpio@611000 {
>   		power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 108 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio4: gpio@620000 {
> @@ -1405,6 +1409,7 @@ main_gpio4: gpio@620000 {
>   		power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 109 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio5: gpio@621000 {
> @@ -1421,6 +1426,7 @@ main_gpio5: gpio@621000 {
>   		power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 110 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio6: gpio@630000 {
> @@ -1438,6 +1444,7 @@ main_gpio6: gpio@630000 {
>   		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 111 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio7: gpio@631000 {
> @@ -1454,6 +1461,7 @@ main_gpio7: gpio@631000 {
>   		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 112 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_sdhci0: mmc@4f80000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> index 0c01bdd9656f1..4d107eee9b341 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
> @@ -281,6 +281,7 @@ wkup_gpio0: gpio@42110000 {
>   		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 113 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	wkup_gpio1: gpio@42100000 {
> @@ -297,6 +298,7 @@ wkup_gpio1: gpio@42100000 {
>   		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 114 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	mcu_i2c0: i2c@40b00000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> index 4cd5346f2dd59..dfb6af60482e7 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> @@ -731,41 +731,20 @@ &main_i2c5 {
>   };
>   
>   &main_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&rpi_header_gpio0_pins_default>;
>   };
>   
>   &main_gpio1 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&rpi_header_gpio1_pins_default>;
>   };
>   
> -&main_gpio2 {
> -	status = "disabled";
> -};
> -
> -&main_gpio3 {
> -	status = "disabled";
> -};
> -
> -&main_gpio4 {
> -	status = "disabled";
> -};
> -
> -&main_gpio5 {
> -	status = "disabled";
> -};
> -
> -&main_gpio6 {
> -	status = "disabled";
> -};
> -
> -&main_gpio7 {
> -	status = "disabled";
> -};
> -
> -&wkup_gpio1 {
> -	status = "disabled";
> +&wkup_gpio0 {
> +	status = "okay";
> +	/* default pins */
>   };
>   
>   &usb_serdes_mux {

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 09/13] arm64: dts: ti: k3-j721s2: Enable GPIO nodes at the board level

[Dhruva Gole]

On 03/08/23 02:23, Andrew Davis wrote:
> GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and
> device information.
> 
> Disable the GPIO nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   .../boot/dts/ti/k3-am68-sk-base-board.dts      | 18 ++----------------
>   .../dts/ti/k3-j721s2-common-proc-board.dts     | 18 ++++++------------
>   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi     |  4 ++++
>   .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi      |  2 ++
>   4 files changed, 14 insertions(+), 28 deletions(-)
> 

Reviewed-by: Dhruva Gole <d-gole@ti.com>

> diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
> index ffca12df0a6da..4c855dffb4cd2 100644
> --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
> @@ -297,31 +297,17 @@ J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
>   };
>   
>   &main_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&rpi_header_gpio0_pins_default>;
>   };
>   
> -&main_gpio2 {
> -	status = "disabled";
> -};
> -
> -&main_gpio4 {
> -	status = "disabled";
> -};
> -
> -&main_gpio6 {
> -	status = "disabled";
> -};
> -
>   &wkup_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
>   };
>   
> -&wkup_gpio1 {
> -	status = "disabled";
> -};
> -
>   &wkup_uart0 {
>   	status = "reserved";
>   	pinctrl-names = "default";
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
> index 3a8e6eb402448..6f248d27a30a4 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
> @@ -266,20 +266,14 @@ J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
>   	};
>   };
>   
> -&main_gpio2 {
> -	status = "disabled";
> -};
> -
> -&main_gpio4 {
> -	status = "disabled";
> -};
> -
> -&main_gpio6 {
> -	status = "disabled";
> +&main_gpio0 {
> +	status = "okay";
> +	/* default pins */
>   };
>   
> -&wkup_gpio1 {
> -	status = "disabled";
> +&wkup_gpio0 {
> +	status = "okay";
> +	/* default pins */
>   };
>   
>   &wkup_uart0 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index c46079fe4ed6e..0cc8057fce13c 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -507,6 +507,7 @@ main_gpio0: gpio@600000 {
>   		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 111 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio2: gpio@610000 {
> @@ -523,6 +524,7 @@ main_gpio2: gpio@610000 {
>   		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 112 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio4: gpio@620000 {
> @@ -539,6 +541,7 @@ main_gpio4: gpio@620000 {
>   		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 113 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio6: gpio@630000 {
> @@ -555,6 +558,7 @@ main_gpio6: gpio@630000 {
>   		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 114 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_i2c0: i2c@2000000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> index 736ec5fa0ea28..3557f3338377d 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> @@ -323,6 +323,7 @@ wkup_gpio0: gpio@42110000 {
>   		power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 115 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	wkup_gpio1: gpio@42100000 {
> @@ -339,6 +340,7 @@ wkup_gpio1: gpio@42100000 {
>   		power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 116 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	wkup_i2c0: i2c@42120000 {

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

[Dhruva Gole]

Andrew,

On 03/08/23 02:23, Andrew Davis wrote:
> GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and
> device information.
> 
> Disable the GPIO nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi      |  4 ++++
>   .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  2 ++
>   3 files changed, 10 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> index dee9056f56051..4a5c4f36baeec 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> @@ -240,27 +240,17 @@ &main_uart3 {
>   	pinctrl-0 = <&main_uart3_pins_default>;
>   };
>   
> -&main_gpio2 {
> -	status = "disabled";
> -};
> -
> -&main_gpio4 {
> -	status = "disabled";
> -};
> -
> -&main_gpio6 {
> -	status = "disabled";
> +&main_gpio0 {
> +	status = "okay";
> +	/* default pins */

Small question, where is the pmx for main_gpio0? What does "default pins"
refer to here? Where are they pinmuxed?

>   };
>   
>   &wkup_gpio0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&wkup_gpio_pins_default>;
>   };
>   
> -&wkup_gpio1 {
> -	status = "disabled";
> -};
> -
>   &mcu_cpsw {
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 5d7542ba41b93..6a776f3bbcb19 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -832,6 +832,7 @@ main_gpio0: gpio@600000 {
>   		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 105 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio2: gpio@610000 {
> @@ -849,6 +850,7 @@ main_gpio2: gpio@610000 {
>   		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 107 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio4: gpio@620000 {
> @@ -866,6 +868,7 @@ main_gpio4: gpio@620000 {
>   		power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 109 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_gpio6: gpio@630000 {
> @@ -883,6 +886,7 @@ main_gpio6: gpio@630000 {
>   		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 111 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	main_spi0: spi@2100000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 571eb0e2eac92..5ae7320efad7b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -297,6 +297,7 @@ wkup_gpio0: gpio@42110000 {
>   		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 113 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	wkup_gpio1: gpio@42100000 {
> @@ -313,6 +314,7 @@ wkup_gpio1: gpio@42100000 {
>   		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
>   		clocks = <&k3_clks 114 0>;
>   		clock-names = "gpio";
> +		status = "disabled";
>   	};
>   
>   	mcu_navss: bus@28380000 {

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 13/13] arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level

[Dhruva Gole]

On 03/08/23 02:23, Andrew Davis wrote:
> TSCADC nodes defined in the top-level AM64 SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and/or
> device information.
> 
> Disable the TSCADC nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 1 +
>   arch/arm64/boot/dts/ti/k3-am642-sk.dts   | 4 ----
>   2 files changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index 49f910e4b03fc..a9db9b6d03aca 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -773,6 +773,7 @@ tscadc0: tscadc@28001000 {
>   		assigned-clock-parents = <&k3_clks 0 3>;
>   		assigned-clock-rates = <60000000>;
>   		clock-names = "fck";
> +		status = "disabled";
>   
>   		adc {
>   			#io-channel-cells = <1>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> index af06ccd466802..722fd285a34ec 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> @@ -513,10 +513,6 @@ cpsw3g_phy1: ethernet-phy@1 {
>   	};
>   };
>   
> -&tscadc0 {
> -	status = "disabled";
> -};
> -

Reviewed-by: Dhruva Gole <d-gole@ti.com>

>   &ospi0 {
>   	status = "okay";
>   	pinctrl-names = "default";

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 12/13] arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level

[Dhruva Gole]

Andrew,

On 03/08/23 02:23, Andrew Davis wrote:
> TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and/or
> device information.
> 
> Disable the TSCADC nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 5 +----
>   arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
>   arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 2 ++
>   3 files changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> index 6041862d5aa75..ba1c14a54acf4 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> @@ -582,11 +582,8 @@ &mcu_spi0 {
>   	ti,pindir-d0-out-d1-in;
>   };
>   
> -&tscadc0 {
> -	status = "disabled";
> -};
> -
>   &tscadc1 {
> +	status = "okay";

The commit body says,
"Disable the TSCADC nodes in the dtsi files"

Please can we also provide some explanation on why
tscadc1 was left as okay here in a dtsi file?

>   	adc {
>   		ti,adc-channels = <0 1 2 3 4 5>;
>   	};
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
> index 2c9c20a9d9179..4defde540fe0b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
> @@ -112,6 +112,7 @@ tscadc0: tscadc@40200000 {
>   		dmas = <&mcu_udmap 0x7100>,
>   			<&mcu_udmap 0x7101 >;
>   		dma-names = "fifo0", "fifo1";
> +		status = "disabled";
>   
>   		adc {
>   			#io-channel-cells = <1>;
> @@ -130,6 +131,7 @@ tscadc1: tscadc@40210000 {
>   		dmas = <&mcu_udmap 0x7102>,
>   			<&mcu_udmap 0x7103>;
>   		dma-names = "fifo0", "fifo1";
> +		status = "disabled";
>   
>   		adc {
>   			#io-channel-cells = <1>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
> index 43de7c132d343..17f45a9f7b146 100644
> --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
> @@ -478,12 +478,14 @@ &usb0_phy {
>   };
>   
>   &tscadc0 {
> +	status = "okay";
>   	adc {
>   		ti,adc-channels = <0 1 2 3 4 5 6 7>;
>   	};
>   };
>   
>   &tscadc1 {
> +	status = "okay";
>   	adc {
>   		ti,adc-channels = <0 1 2 3 4 5 6 7>;
>   	};

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

[Dhruva Gole]

Hi Andrew,

On 03/08/23 02:23, Andrew Davis wrote:
> OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
> and may not be functional unless they are extended with pinmux and
> device information.
> 
> As the attached OSPI device is only known about at the board integration
> level, these nodes should only be enabled when provided with this
> information.
> 
> Disable the OSPI nodes in the dtsi files and only enable the ones that
> are actually pinned out on a given board.
> 
> Signed-off-by: Andrew Davis <afd@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 +
>   arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
>   arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 1 +
>   3 files changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> index e26bd988e5224..6041862d5aa75 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> @@ -593,6 +593,7 @@ adc {
>   };
>   
>   &ospi0 {
> +	status = "okay";

Ok, so this k3-am65-iot2050 series of DT files seem to be structured in
a bit different manner than our SKs and EVMs?

The terminologies like advanced, advanced-m2, basic, etc. are a little
confusing to me. However, I am wondering if we don't do any status = ..
here, and rather make ospi status okays from the iot2050 dts files?

Pardon me if I am making an invalid suggestion, I don't have much
background on these boards.

>   	pinctrl-names = "default";
>   	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
> index 7b1f94a89eca8..2c9c20a9d9179 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
> @@ -295,6 +295,7 @@ ospi0: spi@47040000 {
>   			power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
>   			#address-cells = <1>;
>   			#size-cells = <0>;
> +			status = "disabled";
>   		};
>   
>   		ospi1: spi@47050000 {
> @@ -309,6 +310,7 @@ ospi1: spi@47050000 {
>   			power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
>   			#address-cells = <1>;
>   			#size-cells = <0>;
> +			status = "disabled";
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
> index 973a89b04a22f..43de7c132d343 100644
> --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
> @@ -530,6 +530,7 @@ &mcu_r5fss0_core1 {
>   };
>   
>   &ospi0 {
> +	status = "okay";
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
>   

-- 
Thanks and Regards,
Dhruva Gole

Re: [PATCH 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

[Andrew Davis]

On 8/7/23 1:16 AM, Dhruva Gole wrote:
> Hi Andrew,
> 
> On 03/08/23 02:23, Andrew Davis wrote:
>> OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
>> and may not be functional unless they are extended with pinmux and
>> device information.
>>
>> As the attached OSPI device is only known about at the board integration
>> level, these nodes should only be enabled when provided with this
>> information.
>>
>> Disable the OSPI nodes in the dtsi files and only enable the ones that
>> are actually pinned out on a given board.
>>
>> Signed-off-by: Andrew Davis <afd@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 +
>>   arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
>>   arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 1 +
>>   3 files changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>> index e26bd988e5224..6041862d5aa75 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>> @@ -593,6 +593,7 @@ adc {
>>   };
>>   &ospi0 {
>> +    status = "okay";
> 
> Ok, so this k3-am65-iot2050 series of DT files seem to be structured in
> a bit different manner than our SKs and EVMs?
> 
> The terminologies like advanced, advanced-m2, basic, etc. are a little
> confusing to me. However, I am wondering if we don't do any status = ..
> here, and rather make ospi status okays from the iot2050 dts files?
> 
> Pardon me if I am making an invalid suggestion, I don't have much
> background on these boards.
> 

This is a valid question, and yes the IOT2050 DTS organization is
slightly different than the one we use with our SK/EVMs.

The way these DT files tend to work is layering more functionality
or information in each file, starting with the core/most common
in the base .dtsi, and ending with .dts that is specific to a given
board. (In that way I would consider instances of "/delete-node/"
to be an indicator of bad layering, but that is a different topic..)

Any node that is only partially defined in a layer should be marked
disabled, and then only enabled in the layer that finally completes
the node. That is often the pinmux info at the board level.

In this case, the OSPI nodes are complete after this point, there
is no additional information given in the DTS files, so we can
enable it here in this .dtsi file.

Andrew

>>       pinctrl-names = "default";
>>       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
>> index 7b1f94a89eca8..2c9c20a9d9179 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
>> @@ -295,6 +295,7 @@ ospi0: spi@47040000 {
>>               power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
>>               #address-cells = <1>;
>>               #size-cells = <0>;
>> +            status = "disabled";
>>           };
>>           ospi1: spi@47050000 {
>> @@ -309,6 +310,7 @@ ospi1: spi@47050000 {
>>               power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
>>               #address-cells = <1>;
>>               #size-cells = <0>;
>> +            status = "disabled";
>>           };
>>       };
>> diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
>> index 973a89b04a22f..43de7c132d343 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
>> @@ -530,6 +530,7 @@ &mcu_r5fss0_core1 {
>>   };
>>   &ospi0 {
>> +    status = "okay";
>>       pinctrl-names = "default";
>>       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
> 

Re: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

[Andrew Davis]

On 8/7/23 12:38 AM, Dhruva Gole wrote:
> Andrew,
> 
> On 03/08/23 02:23, Andrew Davis wrote:
>> GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
>> and may not be functional unless they are extended with pinmux and
>> device information.
>>
>> Disable the GPIO nodes in the dtsi files and only enable the ones that
>> are actually pinned out on a given board.
>>
>> Signed-off-by: Andrew Davis <afd@ti.com>
>> ---
>>   .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
>>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi      |  4 ++++
>>   .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  2 ++
>>   3 files changed, 10 insertions(+), 14 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> index dee9056f56051..4a5c4f36baeec 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>> @@ -240,27 +240,17 @@ &main_uart3 {
>>       pinctrl-0 = <&main_uart3_pins_default>;
>>   };
>> -&main_gpio2 {
>> -    status = "disabled";
>> -};
>> -
>> -&main_gpio4 {
>> -    status = "disabled";
>> -};
>> -
>> -&main_gpio6 {
>> -    status = "disabled";
>> +&main_gpio0 {
>> +    status = "okay";
>> +    /* default pins */
> 
> Small question, where is the pmx for main_gpio0? What does "default pins"
> refer to here? Where are they pinmuxed?
> 

Good question, where is the pmx for main_gpio0? I don't know, it was
never defined before either, we only are noticing this now as we are
disabling by default instead of leaving an unfinished node enabled
by default. (another benefit of this disabled by default scheme).

What is really happening is GPIO nodes we tend to pinmux differently
than normal device nodes. Their pinmux selections tends to be spread
out in all the nodes that make use of these GPIO pins, not all together
here in this node.

For instance in this device we use one of the main_gpio0 pins as a
GPIO toggled regulator, and we define the pinmux for it in that node
(see vdd-sd-dv-default-pins).

We can either define the rest of the pins not used elsewhere
here, or we can consider GPIO an exception to the rule, I'd say
the latter is fine for now.

Andrew

>>   };
>>   &wkup_gpio0 {
>> +    status = "okay";
>>       pinctrl-names = "default";
>>       pinctrl-0 = <&wkup_gpio_pins_default>;
>>   };
>> -&wkup_gpio1 {
>> -    status = "disabled";
>> -};
>> -
>>   &mcu_cpsw {
>>       pinctrl-names = "default";
>>       pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> index 5d7542ba41b93..6a776f3bbcb19 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> @@ -832,6 +832,7 @@ main_gpio0: gpio@600000 {
>>           power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 105 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_gpio2: gpio@610000 {
>> @@ -849,6 +850,7 @@ main_gpio2: gpio@610000 {
>>           power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 107 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_gpio4: gpio@620000 {
>> @@ -866,6 +868,7 @@ main_gpio4: gpio@620000 {
>>           power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 109 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_gpio6: gpio@630000 {
>> @@ -883,6 +886,7 @@ main_gpio6: gpio@630000 {
>>           power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 111 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       main_spi0: spi@2100000 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> index 571eb0e2eac92..5ae7320efad7b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> @@ -297,6 +297,7 @@ wkup_gpio0: gpio@42110000 {
>>           power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 113 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       wkup_gpio1: gpio@42100000 {
>> @@ -313,6 +314,7 @@ wkup_gpio1: gpio@42100000 {
>>           power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
>>           clocks = <&k3_clks 114 0>;
>>           clock-names = "gpio";
>> +        status = "disabled";
>>       };
>>       mcu_navss: bus@28380000 {
> 

Re: [PATCH 12/13] arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level

[Andrew Davis]

On 8/7/23 12:51 AM, Dhruva Gole wrote:
> Andrew,
> 
> On 03/08/23 02:23, Andrew Davis wrote:
>> TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
>> and may not be functional unless they are extended with pinmux and/or
>> device information.
>>
>> Disable the TSCADC nodes in the dtsi files and only enable the ones that
>> are actually pinned out on a given board.
>>
>> Signed-off-by: Andrew Davis <afd@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 5 +----
>>   arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
>>   arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 2 ++
>>   3 files changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>> index 6041862d5aa75..ba1c14a54acf4 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>> @@ -582,11 +582,8 @@ &mcu_spi0 {
>>       ti,pindir-d0-out-d1-in;
>>   };
>> -&tscadc0 {
>> -    status = "disabled";
>> -};
>> -
>>   &tscadc1 {
>> +    status = "okay";
> 
> The commit body says,
> "Disable the TSCADC nodes in the dtsi files"
> 
> Please can we also provide some explanation on why
> tscadc1 was left as okay here in a dtsi file?
> 

Same reasoning as in my response for patch [4/13], the node
is complete at this point, so we enable it here.

The commit message is a bit off given these boards do their
pinmuxing in the .dtsi files, not at the last level .dts files
like most boards, but I kept the commit message consistent for
the whole series as this is a rare exception case. I can change
the message wording if you would like.

Andrew

>>       adc {
>>           ti,adc-channels = <0 1 2 3 4 5>;
>>       };
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
>> index 2c9c20a9d9179..4defde540fe0b 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
>> @@ -112,6 +112,7 @@ tscadc0: tscadc@40200000 {
>>           dmas = <&mcu_udmap 0x7100>,
>>               <&mcu_udmap 0x7101 >;
>>           dma-names = "fifo0", "fifo1";
>> +        status = "disabled";
>>           adc {
>>               #io-channel-cells = <1>;
>> @@ -130,6 +131,7 @@ tscadc1: tscadc@40210000 {
>>           dmas = <&mcu_udmap 0x7102>,
>>               <&mcu_udmap 0x7103>;
>>           dma-names = "fifo0", "fifo1";
>> +        status = "disabled";
>>           adc {
>>               #io-channel-cells = <1>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
>> index 43de7c132d343..17f45a9f7b146 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
>> @@ -478,12 +478,14 @@ &usb0_phy {
>>   };
>>   &tscadc0 {
>> +    status = "okay";
>>       adc {
>>           ti,adc-channels = <0 1 2 3 4 5 6 7>;
>>       };
>>   };
>>   &tscadc1 {
>> +    status = "okay";
>>       adc {
>>           ti,adc-channels = <0 1 2 3 4 5 6 7>;
>>       };
> 

Re: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

[Nishanth Menon]

On 10:28-20230807, Andrew Davis wrote:
> On 8/7/23 12:38 AM, Dhruva Gole wrote:
> > Andrew,
> > 
> > On 03/08/23 02:23, Andrew Davis wrote:
> > > GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
> > > and may not be functional unless they are extended with pinmux and
> > > device information.
> > > 
> > > Disable the GPIO nodes in the dtsi files and only enable the ones that
> > > are actually pinned out on a given board.
> > > 
> > > Signed-off-by: Andrew Davis <afd@ti.com>
> > > ---
> > >   .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
> > >   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi      |  4 ++++
> > >   .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  2 ++
> > >   3 files changed, 10 insertions(+), 14 deletions(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> > > index dee9056f56051..4a5c4f36baeec 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> > > +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> > > @@ -240,27 +240,17 @@ &main_uart3 {
> > >       pinctrl-0 = <&main_uart3_pins_default>;
> > >   };
> > > -&main_gpio2 {
> > > -    status = "disabled";
> > > -};
> > > -
> > > -&main_gpio4 {
> > > -    status = "disabled";
> > > -};
> > > -
> > > -&main_gpio6 {
> > > -    status = "disabled";
> > > +&main_gpio0 {
> > > +    status = "okay";
> > > +    /* default pins */
> > 
> > Small question, where is the pmx for main_gpio0? What does "default pins"
> > refer to here? Where are they pinmuxed?
> > 
> 
> Good question, where is the pmx for main_gpio0? I don't know, it was
> never defined before either, we only are noticing this now as we are
> disabling by default instead of leaving an unfinished node enabled
> by default. (another benefit of this disabled by default scheme).
> 
> What is really happening is GPIO nodes we tend to pinmux differently
> than normal device nodes. Their pinmux selections tends to be spread
> out in all the nodes that make use of these GPIO pins, not all together
> here in this node.
> 
> For instance in this device we use one of the main_gpio0 pins as a
> GPIO toggled regulator, and we define the pinmux for it in that node
> (see vdd-sd-dv-default-pins).
> 
> We can either define the rest of the pins not used elsewhere
> here, or we can consider GPIO an exception to the rule, I'd say
> the latter is fine for now.


GPIO pinmux are typically defined where they need - the only place where
they are explicitly called out in gpio is when they are meant to be used by
libgpio - typically in the case of dev boards.

Just drop the comments of /* default pins */ - that is just mis-leading.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Re: [PATCH 10/13] arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level

[Andrew Davis]

On 8/7/23 10:42 AM, Nishanth Menon wrote:
> On 10:28-20230807, Andrew Davis wrote:
>> On 8/7/23 12:38 AM, Dhruva Gole wrote:
>>> Andrew,
>>>
>>> On 03/08/23 02:23, Andrew Davis wrote:
>>>> GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
>>>> and may not be functional unless they are extended with pinmux and
>>>> device information.
>>>>
>>>> Disable the GPIO nodes in the dtsi files and only enable the ones that
>>>> are actually pinned out on a given board.
>>>>
>>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>>> ---
>>>>    .../boot/dts/ti/k3-j7200-common-proc-board.dts | 18 ++++--------------
>>>>    arch/arm64/boot/dts/ti/k3-j7200-main.dtsi      |  4 ++++
>>>>    .../arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  2 ++
>>>>    3 files changed, 10 insertions(+), 14 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>>> index dee9056f56051..4a5c4f36baeec 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
>>>> @@ -240,27 +240,17 @@ &main_uart3 {
>>>>        pinctrl-0 = <&main_uart3_pins_default>;
>>>>    };
>>>> -&main_gpio2 {
>>>> -    status = "disabled";
>>>> -};
>>>> -
>>>> -&main_gpio4 {
>>>> -    status = "disabled";
>>>> -};
>>>> -
>>>> -&main_gpio6 {
>>>> -    status = "disabled";
>>>> +&main_gpio0 {
>>>> +    status = "okay";
>>>> +    /* default pins */
>>>
>>> Small question, where is the pmx for main_gpio0? What does "default pins"
>>> refer to here? Where are they pinmuxed?
>>>
>>
>> Good question, where is the pmx for main_gpio0? I don't know, it was
>> never defined before either, we only are noticing this now as we are
>> disabling by default instead of leaving an unfinished node enabled
>> by default. (another benefit of this disabled by default scheme).
>>
>> What is really happening is GPIO nodes we tend to pinmux differently
>> than normal device nodes. Their pinmux selections tends to be spread
>> out in all the nodes that make use of these GPIO pins, not all together
>> here in this node.
>>
>> For instance in this device we use one of the main_gpio0 pins as a
>> GPIO toggled regulator, and we define the pinmux for it in that node
>> (see vdd-sd-dv-default-pins).
>>
>> We can either define the rest of the pins not used elsewhere
>> here, or we can consider GPIO an exception to the rule, I'd say
>> the latter is fine for now.
> 
> 
> GPIO pinmux are typically defined where they need - the only place where
> they are explicitly called out in gpio is when they are meant to be used by
> libgpio - typically in the case of dev boards.
> 
> Just drop the comments of /* default pins */ - that is just mis-leading.
> 

True, will drop the comment for v2.

Andrew

Re: [PATCH 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

[Jan Kiszka]

On 07.08.23 17:18, Andrew Davis wrote:
> On 8/7/23 1:16 AM, Dhruva Gole wrote:
>> Hi Andrew,
>>
>> On 03/08/23 02:23, Andrew Davis wrote:
>>> OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
>>> and may not be functional unless they are extended with pinmux and
>>> device information.
>>>
>>> As the attached OSPI device is only known about at the board integration
>>> level, these nodes should only be enabled when provided with this
>>> information.
>>>
>>> Disable the OSPI nodes in the dtsi files and only enable the ones that
>>> are actually pinned out on a given board.
>>>
>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>> ---
>>>   arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 +
>>>   arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
>>>   arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 1 +
>>>   3 files changed, 4 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>> b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>> index e26bd988e5224..6041862d5aa75 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>> @@ -593,6 +593,7 @@ adc {
>>>   };
>>>   &ospi0 {
>>> +    status = "okay";
>>
>> Ok, so this k3-am65-iot2050 series of DT files seem to be structured in
>> a bit different manner than our SKs and EVMs?
>>
>> The terminologies like advanced, advanced-m2, basic, etc. are a little
>> confusing to me. However, I am wondering if we don't do any status = ..
>> here, and rather make ospi status okays from the iot2050 dts files?
>>
>> Pardon me if I am making an invalid suggestion, I don't have much
>> background on these boards.
>>
> 
> This is a valid question, and yes the IOT2050 DTS organization is
> slightly different than the one we use with our SK/EVMs.
> 
> The way these DT files tend to work is layering more functionality
> or information in each file, starting with the core/most common
> in the base .dtsi, and ending with .dts that is specific to a given
> board. (In that way I would consider instances of "/delete-node/"
> to be an indicator of bad layering, but that is a different topic..)
> 
> Any node that is only partially defined in a layer should be marked
> disabled, and then only enabled in the layer that finally completes
> the node. That is often the pinmux info at the board level.
> 
> In this case, the OSPI nodes are complete after this point, there
> is no additional information given in the DTS files, so we can
> enable it here in this .dtsi file.
> 

Ack, this file is the right place to enable OSPI because all our boards
have OSPI in use, and therefore it is configured at this common level
already.

And the reasons for delete-node is obviously that there is no dtsi file
that describes the AM6528 with its two cores only. If you consider that
bad layering, you should change your dtsi files ;). But I see no real
problem here, that pattern is not uncommon.

Jan

-- 
Siemens AG, Technology
Linux Expert Center

Re: [PATCH 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level

[Andrew Davis]

On 8/8/23 12:27 AM, Jan Kiszka wrote:
> On 07.08.23 17:18, Andrew Davis wrote:
>> On 8/7/23 1:16 AM, Dhruva Gole wrote:
>>> Hi Andrew,
>>>
>>> On 03/08/23 02:23, Andrew Davis wrote:
>>>> OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
>>>> and may not be functional unless they are extended with pinmux and
>>>> device information.
>>>>
>>>> As the attached OSPI device is only known about at the board integration
>>>> level, these nodes should only be enabled when provided with this
>>>> information.
>>>>
>>>> Disable the OSPI nodes in the dtsi files and only enable the ones that
>>>> are actually pinned out on a given board.
>>>>
>>>> Signed-off-by: Andrew Davis <afd@ti.com>
>>>> ---
>>>>    arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 +
>>>>    arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi            | 2 ++
>>>>    arch/arm64/boot/dts/ti/k3-am654-base-board.dts     | 1 +
>>>>    3 files changed, 4 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>>> b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>>> index e26bd988e5224..6041862d5aa75 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
>>>> @@ -593,6 +593,7 @@ adc {
>>>>    };
>>>>    &ospi0 {
>>>> +    status = "okay";
>>>
>>> Ok, so this k3-am65-iot2050 series of DT files seem to be structured in
>>> a bit different manner than our SKs and EVMs?
>>>
>>> The terminologies like advanced, advanced-m2, basic, etc. are a little
>>> confusing to me. However, I am wondering if we don't do any status = ..
>>> here, and rather make ospi status okays from the iot2050 dts files?
>>>
>>> Pardon me if I am making an invalid suggestion, I don't have much
>>> background on these boards.
>>>
>>
>> This is a valid question, and yes the IOT2050 DTS organization is
>> slightly different than the one we use with our SK/EVMs.
>>
>> The way these DT files tend to work is layering more functionality
>> or information in each file, starting with the core/most common
>> in the base .dtsi, and ending with .dts that is specific to a given
>> board. (In that way I would consider instances of "/delete-node/"
>> to be an indicator of bad layering, but that is a different topic..)
>>
>> Any node that is only partially defined in a layer should be marked
>> disabled, and then only enabled in the layer that finally completes
>> the node. That is often the pinmux info at the board level.
>>
>> In this case, the OSPI nodes are complete after this point, there
>> is no additional information given in the DTS files, so we can
>> enable it here in this .dtsi file.
>>
> 
> Ack, this file is the right place to enable OSPI because all our boards
> have OSPI in use, and therefore it is configured at this common level
> already.
> 
> And the reasons for delete-node is obviously that there is no dtsi file
> that describes the AM6528 with its two cores only. If you consider that
> bad layering, you should change your dtsi files ;). But I see no real
> problem here, that pattern is not uncommon.

Yup, wasn't finger pointing, that is our layering problem. It actually
looks like an easy fix to add an k3-am652.dtsi with only two cores, I'll
go do that for next cycle.

Andrew

> 
> Jan
>