From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFC45C4332F for ; Mon, 19 Dec 2022 10:57:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231312AbiLSK5Y (ORCPT ); Mon, 19 Dec 2022 05:57:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231197AbiLSK5X (ORCPT ); Mon, 19 Dec 2022 05:57:23 -0500 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 210C1BB; Mon, 19 Dec 2022 02:57:20 -0800 (PST) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1p7Dpb-0004km-5j; Mon, 19 Dec 2022 11:57:15 +0100 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Chen-Yu Tsai , Jernej Skrabec , linux-sunxi@lists.linux.dev, Palmer Dabbelt , Conor Dooley , linux-riscv@lists.infradead.org, Samuel Holland Cc: Jisheng Zhang , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , linux-arm-kernel@lists.infradead.org, Andre Przywara , Samuel Holland , Palmer Dabbelt , Conor Dooley Subject: Re: [PATCH v3 04/12] riscv: dts: allwinner: Add the D1/D1s SoC devicetree Date: Mon, 19 Dec 2022 11:57:14 +0100 Message-ID: <2133897.PYKUYFuaPT@diego> In-Reply-To: <20221208090237.20572-5-samuel@sholland.org> References: <20221208090237.20572-1-samuel@sholland.org> <20221208090237.20572-5-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Am Donnerstag, 8. Dezember 2022, 10:02:29 CET schrieb Samuel Holland: > D1 (aka D1-H), D1s (aka F133), R528, and T113 are a family of SoCs based > on a single die, or at a pair of dies derived from the same design. > > D1 and D1s contain a single T-HEAD Xuantie C906 CPU, whereas R528 and > T113 contain a pair of Cortex-A7's. D1 and R528 are the full version of > the chip with a BGA package, whereas D1s and T113 are low-pin-count QFP > variants. > > Because the original design supported both ARM and RISC-V CPUs, some > peripherals are duplicated. In addition, all variants except D1s contain > a HiFi 4 DSP with its own set of peripherals. > > The devicetrees are organized to minimize duplication: > - Common perhiperals are described in sunxi-d1s-t113.dtsi > - DSP-related peripherals are described in sunxi-d1-t113.dtsi > - RISC-V specific hardware is described in sun20i-d1s.dtsi > - Functionality unique to the D1 variant is described in sun20i-d1.dtsi > > The SOC_PERIPHERAL_IRQ macro handles the different #interrupt-cells > values between the ARM (GIC) and RISC-V (PLIC) versions of the SoC. > > Acked-by: Jernej Skrabec > Acked-by: Palmer Dabbelt > Reviewed-by: Conor Dooley > Tested-by: Heiko Stuebner > Signed-off-by: Samuel Holland after spending some more time looking at the devicetree, I'm pretty confident that it looks ok, so also Reviewed-by: Heiko Stuebner