From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: adrian.ho.yin.ng@intel.com, gregkh@linuxfoundation.org,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, linux-usb@vger.kernel.org,
devicetree@vger.kernel.org, Thinh.Nguyen@synopsys.com,
p.zabel@pengutronix.de
Subject: Re: [PATCH 1/2] dt-bindings: usb: Add Intel SoCFPGA USB controller bindings
Date: Fri, 21 Jul 2023 10:04:15 +0200 [thread overview]
Message-ID: <216a3abe-1350-cbb1-4cfd-0dc4d7f70a88@linaro.org> (raw)
In-Reply-To: <68037e45970a9ef930c609c002d36863d96b39cc.1689913114.git.adrian.ho.yin.ng@intel.com>
On 21/07/2023 06:30, adrian.ho.yin.ng@intel.com wrote:
> From: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
>
> Existing binding intel,keembay-dwc3.yaml does not have the required
> properties for Intel SoCFPGA devices.
> Introduce new binding description for Intel SoCFPGA USB controller
> which will be used for current and future SoCFPGA devices.
>
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
A nit, subject: drop second/last, redundant "bindings". The
"dt-bindings" prefix is already stating that these are bindings.
> ---
> .../bindings/usb/intel,socfpga-dwc3.yaml | 78 +++++++++++++++++++
> 1 file changed, 78 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
Filename matching compatible.
>
> diff --git a/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> new file mode 100644
> index 000000000000..dedef70df887
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/intel,socfpga-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel SoCFPGA DWC3 USB controller
> +
> +maintainers:
> + - Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> +
> +properties:
> + compatible:
> + const: intel,agilex5-dwc3
Why using compatible style different than other Agilex blocks? Which one
is recommended/official/correct?
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 2
What are the items?
> +
> + ranges: true
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: dwc3
> + - const: dwc3-ecc
> +
> + '#address-cells':
> + enum: [ 1, 2 ]
> +
> + '#size-cells':
> + enum: [ 1, 2 ]
> +
> +# Required child node:
> +
> +patternProperties:
> + "^usb@[0-9a-f]+$":
> + $ref: snps,dwc3.yaml#
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> + - ranges
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/reset/altr,rst-mgr.h>
> + #define AGILEX5_USB31_SUSPEND_CLK
> + #define AGILEX5_USB31_BUS_CLK_EARLY
Drop defines. Include proper header or use some numbers, if the headers
are not there yet.
> +
> + usb1@11000000 {
Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
> + compatible = "intel,agilex5-dwc3";
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-07-21 8:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-21 4:30 [PATCH 0/2] Add support for Intel SocFPGA DWC3 USB controller adrian.ho.yin.ng
2023-07-21 4:30 ` [PATCH 1/2] dt-bindings: usb: Add Intel SoCFPGA USB controller bindings adrian.ho.yin.ng
2023-07-21 8:04 ` Krzysztof Kozlowski [this message]
2023-07-24 6:35 ` Ng, Adrian Ho Yin
2023-07-24 7:01 ` Krzysztof Kozlowski
2023-07-21 4:30 ` [PATCH 2/2] usb: dwc3: of-simple: Add compatible string for Intel Agilex5 platform adrian.ho.yin.ng
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