From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8DEFB76033; Tue, 25 Jun 2024 12:08:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719317283; cv=none; b=crNMp338q2V6NfDaN80HKdeOzHcZirX3Dlli7JmM/O+2e9RwOrLdEEKdSXwYhBJJM4Cfthw6sdSYLl2YfKDHST3DxLU1j35mXjJVm44rk4Y2d5dg9hcQksba5cR5X+bA99uvpvnGdFHv1RoM9xEluGpKmLpuvGo9aFHHldeGBLU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719317283; c=relaxed/simple; bh=m8tIrc1sWFgEwX6WOIcCs62UPM0w6ggjdthEIhC+k6Y=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=NIF4VfW/Q381gKIUGDVhYLLucjfnoK9+uNnyZ1kFQdSgb6CePmRZLJ02b8fWNZ1HHTfOAQ6zx4c+PmlrOtZulQ6adx87MOhO9CX9tlxu5JO4qkBaX6UDp0x61RSwQfXBIgN92+V11wolcjOmgfg7iN1EAa8RGj67zaVCenzwyRM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=hbi53Rsr; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="hbi53Rsr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1719317278; bh=m8tIrc1sWFgEwX6WOIcCs62UPM0w6ggjdthEIhC+k6Y=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=hbi53RsrJ4v0U7gLGkx3h+7HrhC9Q06tlmp2a7T5rc53iWPlZX7gh9hkMxrWNIE+a uMqG7gLMY+svBCZCXs5dRsySoz4HZ+qoZF2qN5HqvYQtqL7hwO4dfZoa71wg2gVhWg uPDXAW+6ZWLNADfYvxv00/wx+04W34/2vUrZ+vfz8P+zgbWMvf2e7FQgxKL70JYkLy nVAQsQU1hHF7H4MKlpFULu4dtB+prcZhq+QqhSd+GIojRbUArNUkHQIa8tztuQ5qZW qJErwhS6VweE/9j23VcoBPe5y2B0E5LW06UzEBM/ys8JTPunrlpXeWOE2gXRiOhVZW q9/IbkkfeKgGQ== Received: from [100.113.186.2] (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id A8AAD378216A; Tue, 25 Jun 2024 12:07:57 +0000 (UTC) Message-ID: <21a08e00-a506-45c1-bcdb-4e6726338063@collabora.com> Date: Tue, 25 Jun 2024 14:07:57 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] arm64: dts: mediatek: Introduce the MT8395 Radxa NIO 12L board To: Shengyu Qu , linux-mediatek@lists.infradead.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, wenst@chromium.org, hsinyi@chromium.org, nfraprado@collabora.com, macpaul.lin@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, stephen@radxa.com, tom@radxa.com References: <20240202114821.79227-1-angelogioacchino.delregno@collabora.com> <20240202114821.79227-3-angelogioacchino.delregno@collabora.com> From: AngeloGioacchino Del Regno Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Il 25/06/24 13:30, Shengyu Qu ha scritto: > Hello, > > What bootloader and tf-a are you using for testing these patches, > mainline or vendor? I'd like to try them too. > Hello, Bootloader/TF-A: either the Yocto one or the Ubuntu one is fine. Check MediaTek's guides [1] and [2]. For the rest, I tested on the Ubuntu that you can get from the guides, although it's missing some components for upstream (audio, mainly), and then also on Debian Bookworm and on an ArchLinux userspace, both of which I also use for testing MediaTek Chromebooks. [1]: https://mediatek.gitlab.io/genio/doc/ubuntu/get-started/genio-1200-evk [2]: https://mediatek.gitlab.io/aiot/doc/aiot-dev-guide/master/sw/yocto/get-started.html P.S.: Please avoid top posting! Cheers, Angelo > Best regards, > Shengyu > > 在 2024/2/2 19:48, AngeloGioacchino Del Regno 写道: >> Add a device tree for the Radxa NIO 12L SBC, powered by the MediaTek >> MT8395 Genio 1200 SoC. >> >> This board features: >> * MT6359 + MT6360 PMICs at I2C-6 >> - Regulators, battery charger, TypeC Port Controller Interface >> - Audio through 3.5mm jack (2CH out, 1CH in) >> * Two MT6315 PMICs over SPMI >> - CPU-Big and GPU Core regulators >> * Network Connectivity >> - Realtek RTL8211FD MDIO PHY/Transceiver, 10/100/1000M Ethernet >> - MT7921E WiFi (PCIe1) / Bluetooth (USB 2.0) combo chip >> * Storage >> - On-board UFS storage >> - On-board eMMC on MMC0 controller >> - MicroSD card slot on MMC1 controller >> * Other connectivity >> - 1x USB Type-C Charging/Power only port >> - 1x USB 3.2 SuperSpeed Type-C OTG+DisplayPort mode >> - Muxed by ITE IT5205 Alternate Mode Passive MUX >> - 4x USB 3.0 Type-A ports on VL805 USB Hub (PCIe0) >> - 1x HDMI IN port >> - 1x HDMI OUT port >> - 1x MIPI DSI (Display) port >> - 2x MIPI CSI (Camera) ports >> * 40-pin Expansion Header >> - Two UART ports >> - I2C, SPI busses >> - I2S for external audio chips >> - ADC >> - GPIOs >> >> Signed-off-by: AngeloGioacchino Del Regno >> --- >> arch/arm64/boot/dts/mediatek/Makefile | 1 + >> .../dts/mediatek/mt8395-radxa-nio-12l.dts | 825 ++++++++++++++++++ >> 2 files changed, 826 insertions(+) >> create mode 100644 arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts >> >> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile >> index 1e6f91731e92..fdd8f4a58003 100644 >> --- a/arch/arm64/boot/dts/mediatek/Makefile >> +++ b/arch/arm64/boot/dts/mediatek/Makefile >> @@ -63,4 +63,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-genio-1200-evk.dtb >> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l.dtb >> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb >> diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts >> new file mode 100644 >> index 000000000000..e5d9b671a405 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts >> @@ -0,0 +1,825 @@ >> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) >> +/* >> + * Copyright (C) 2023 Radxa Limited >> + * Copyright (C) 2024 Collabora Ltd. >> + * AngeloGioacchino Del Regno >> + */ >> + >> +#include "mt8195.dtsi" >> +#include "mt6359.dtsi" >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +/ { >> + model = "Radxa NIO 12L"; >> + chassis-type = "embedded"; >> + compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195"; >> + >> + aliases { >> + i2c0 = &i2c2; >> + i2c1 = &i2c3; >> + i2c2 = &i2c4; >> + i2c3 = &i2c0; >> + i2c4 = &i2c1; >> + ethernet0 = ð >> + serial0 = &uart0; >> + serial1 = &uart1; >> + spi0 = &spi1; >> + spi1 = &spi2; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:921600n8"; >> + }; >> + >> + firmware { >> + optee { >> + compatible = "linaro,optee-tz"; >> + method = "smc"; >> + }; >> + }; >> + >> + memory@40000000 { >> + device_type = "memory"; >> + reg = <0 0x40000000 0x1 0x0>; >> + }; >> + >> + wifi_vreg: regulator-wifi-3v3-en { >> + compatible = "regulator-fixed"; >> + regulator-name = "wifi_3v3_en"; >> + regulator-always-on; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + enable-active-high; >> + gpio = <&pio 67 GPIO_ACTIVE_HIGH>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&wifi_vreg_pins>; >> + vin-supply = <&vsys>; >> + }; >> + >> + /* system wide switching 5.0V power rail */ >> + vsys: regulator-vsys { >> + compatible = "regulator-fixed"; >> + regulator-name = "vsys"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + vin-supply = <&vcc5v0_vsys>; >> + }; >> + >> + vsys_buck: regulator-vsys-buck { >> + compatible = "regulator-fixed"; >> + regulator-name = "vsys_buck"; >> + regulator-always-on; >> + regulator-boot-on; >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + vin-supply = <&vcc5v0_vsys>; >> + }; >> + >> + /* Rail from power-only "TYPE C DC" port */ >> + vcc5v0_vsys: regulator-vcc5v0-sys { >> + compatible = "regulator-fixed"; >> + regulator-name = "vcc5v0_sys"; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + reserved-memory { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + >> + /* >> + * 12 MiB reserved for OP-TEE (BL32) >> + * +-----------------------+ 0x43e0_0000 >> + * | SHMEM 2MiB | >> + * +-----------------------+ 0x43c0_0000 >> + * | | TA_RAM 8MiB | >> + * + TZDRAM +--------------+ 0x4340_0000 >> + * | | TEE_RAM 2MiB | >> + * +-----------------------+ 0x4320_0000 >> + */ >> + optee_reserved: optee@43200000 { >> + reg = <0 0x43200000 0 0xc00000>; >> + no-map; >> + }; >> + >> + scp_mem: memory@50000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0 0x50000000 0 0x2900000>; >> + no-map; >> + }; >> + >> + vpu_mem: memory@53000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0 0x53000000 0 0x1400000>; /* 20 MB */ >> + }; >> + >> + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ >> + bl31_secmon_mem: memory@54600000 { >> + reg = <0 0x54600000 0x0 0x200000>; >> + no-map; >> + }; >> + >> + afe_mem: memory@60000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0 0x60000000 0 0x1100000>; >> + no-map; >> + }; >> + >> + apu_mem: memory@62000000 { >> + compatible = "shared-dma-pool"; >> + reg = <0 0x62000000 0 0x1400000>; /* 20 MB */ >> + }; >> + }; >> +}; >> + >> +ð { >> + phy-mode = "rgmii-rxid"; >> + phy-handle = <&rgmii_phy>; >> + pinctrl-names = "default", "sleep"; >> + pinctrl-0 = <ð_default_pins>; >> + pinctrl-1 = <ð_sleep_pins>; >> + mediatek,tx-delay-ps = <2030>; >> + mediatek,mac-wol; >> + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; >> + snps,reset-delays-us = <0 20000 100000>; >> + status = "okay"; >> + >> + mdio { >> + rgmii_phy: ethernet-phy@1 { >> + compatible = "ethernet-phy-id001c.c916"; >> + reg = <0x1>; >> + }; >> + }; >> +}; >> + >> +&gpu { >> + mali-supply = <&mt6315_7_vbuck1>; >> + status = "okay"; >> +}; >> + >> +&i2c2 { >> + clock-frequency = <400000>; >> + pinctrl-0 = <&i2c2_pins>; >> + pinctrl-names = "default"; >> + status = "okay"; >> + >> + typec-mux@48 { >> + compatible = "ite,it5205"; >> + reg = <0x48>; >> + >> + mode-switch; >> + orientation-switch; >> + >> + vcc-supply = <&mt6359_vibr_ldo_reg>; >> + >> + port { >> + it5205_sbu_mux: endpoint { >> + remote-endpoint = <&typec_con_mux>; >> + }; >> + }; >> + }; >> +}; >> + >> +&i2c4 { >> + clock-frequency = <400000>; >> + pinctrl-0 = <&i2c4_pins>; >> + pinctrl-names = "default"; >> + status = "okay"; >> + >> + /* I2C4 exposed at 39-pins MIPI-LCD connector */ >> +}; >> + >> +&i2c6 { >> + clock-frequency = <400000>; >> + pinctrl-0 = <&i2c6_pins>; >> + pinctrl-names = "default"; >> + status = "okay"; >> + >> + mt6360: pmic@34 { >> + compatible = "mediatek,mt6360"; >> + reg = <0x34>; >> + interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>; >> + interrupt-names = "IRQB"; >> + interrupt-controller; >> + #interrupt-cells = <1>; >> + pinctrl-0 = <&mt6360_pins>; >> + >> + charger { >> + compatible = "mediatek,mt6360-chg"; >> + richtek,vinovp-microvolt = <14500000>; >> + >> + otg_vbus_regulator: usb-otg-vbus-regulator { >> + regulator-name = "usb-otg-vbus"; >> + regulator-min-microvolt = <4425000>; >> + regulator-max-microvolt = <5825000>; >> + }; >> + }; >> + >> + regulator { >> + compatible = "mediatek,mt6360-regulator"; >> + LDO_VIN1-supply = <&vsys_buck>; >> + LDO_VIN3-supply = <&mt6360_buck2>; >> + >> + mt6360_buck1: buck1 { >> + regulator-name = "emi_vdd2"; >> + regulator-min-microvolt = <300000>; >> + regulator-max-microvolt = <1300000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP >> + MT6360_OPMODE_ULP>; >> + regulator-always-on; >> + }; >> + >> + mt6360_buck2: buck2 { >> + regulator-name = "emi_vddq"; >> + regulator-min-microvolt = <300000>; >> + regulator-max-microvolt = <1300000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP >> + MT6360_OPMODE_ULP>; >> + regulator-always-on; >> + }; >> + >> + mt6360_ldo1: ldo1 { >> + regulator-name = "ext_lcd_3v3"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP>; >> + regulator-always-on; >> + }; >> + >> + mt6360_ldo2: ldo2 { >> + regulator-name = "panel1_p1v8"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP>; >> + }; >> + >> + mt6360_ldo3: ldo3 { >> + regulator-name = "vmc_pmu"; >> + regulator-min-microvolt = <1200000>; >> + regulator-max-microvolt = <3600000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP>; >> + }; >> + >> + mt6360_ldo5: ldo5 { >> + regulator-name = "vmch_pmu"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP>; >> + regulator-always-on; >> + }; >> + >> + mt6360_ldo6: ldo6 { >> + regulator-name = "mt6360_ldo6"; /* Test point */ >> + regulator-min-microvolt = <500000>; >> + regulator-max-microvolt = <2100000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP>; >> + }; >> + >> + mt6360_ldo7: ldo7 { >> + regulator-name = "emi_vmddr_en"; >> + regulator-min-microvolt = <500000>; >> + regulator-max-microvolt = <2100000>; >> + regulator-allowed-modes = > + MT6360_OPMODE_LP>; >> + regulator-always-on; >> + }; >> + }; >> + >> + typec { >> + compatible = "mediatek,mt6360-tcpc"; >> + interrupts-extended = <&pio 100 IRQ_TYPE_LEVEL_LOW>; >> + interrupt-names = "PD_IRQB"; >> + >> + connector { >> + compatible = "usb-c-connector"; >> + label = "USB-C"; >> + data-role = "dual"; >> + op-sink-microwatt = <10000000>; >> + power-role = "dual"; >> + try-power-role = "sink"; >> + >> + source-pdos = > + PDO_FIXED_DUAL_ROLE | >> + PDO_FIXED_DATA_SWAP)>; >> + sink-pdos = > + PDO_FIXED_DUAL_ROLE | >> + PDO_FIXED_DATA_SWAP)>; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + typec_con_hs: endpoint { >> + remote-endpoint = <&mtu3_hs0_role_sw>; >> + }; >> + }; >> + >> + port@2 { >> + reg = <2>; >> + typec_con_mux: endpoint { >> + remote-endpoint = <&it5205_sbu_mux>; >> + }; >> + }; >> + }; >> + }; >> + }; >> + }; >> +}; >> + >> +/* MMC0 Controller: eMMC (HS400). Power lines are shared with UFS! */ >> +&mmc0 { >> + pinctrl-names = "default", "state_uhs"; >> + pinctrl-0 = <&mmc0_default_pins>; >> + pinctrl-1 = <&mmc0_uhs_pins>; >> + bus-width = <8>; >> + max-frequency = <200000000>; >> + hs400-ds-delay = <0x14c11>; >> + cap-mmc-highspeed; >> + cap-mmc-hw-reset; >> + mmc-hs200-1_8v; >> + mmc-hs400-1_8v; >> + no-sdio; >> + no-sd; >> + non-removable; >> + vmmc-supply = <&mt6359_vemc_1_ldo_reg>; >> + vqmmc-supply = <&mt6359_vufs_ldo_reg>; >> + status = "okay"; >> +}; >> + >> +/* MMC1 Controller: MicroSD card slot */ >> +&mmc1 { >> + pinctrl-names = "default", "state_uhs"; >> + pinctrl-0 = <&mmc1_default_pins>, <&mmc1_pins_detect>; >> + pinctrl-1 = <&mmc1_default_pins>; >> + bus-width = <4>; >> + max-frequency = <200000000>; >> + cap-sd-highspeed; >> + cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>; >> + no-mmc; >> + no-sdio; >> + sd-uhs-sdr50; >> + sd-uhs-sdr104; >> + vmmc-supply = <&mt6360_ldo5>; >> + vqmmc-supply = <&mt6360_ldo3>; >> + status = "okay"; >> +}; >> + >> +&mt6359_vaud18_ldo_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vbbck_ldo_reg { >> + regulator-always-on; >> +}; >> + >> +/* For USB Hub */ >> +&mt6359_vcamio_ldo_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vcn33_2_bt_ldo_reg { >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> +}; >> + >> +&mt6359_vcore_buck_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vgpu11_buck_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vproc1_buck_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vproc2_buck_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vpu_buck_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vrf12_ldo_reg { >> + regulator-always-on; >> +}; >> + >> +&mt6359_vsram_md_ldo_reg { >> + regulator-always-on; >> +}; >> + >> +/* for GPU SRAM */ >> +&mt6359_vsram_others_ldo_reg { >> + regulator-min-microvolt = <750000>; >> + regulator-max-microvolt = <750000>; >> +}; >> + >> +&pio { >> + eth_default_pins: eth-default-pins { >> + pins-cc { >> + pinmux = , >> + , >> + , >> + ; >> + drive-strength = <8>; >> + }; >> + >> + pins-mdio { >> + pinmux = , >> + ; >> + input-enable; >> + }; >> + >> + pins-power { >> + pinmux = , >> + ; >> + output-high; >> + }; >> + >> + pins-rst { >> + pinmux = ; >> + }; >> + >> + pins-rxd { >> + pinmux = , >> + , >> + , >> + ; >> + }; >> + >> + pins-txd { >> + pinmux = , >> + , >> + , >> + ; >> + drive-strength = <8>; >> + }; >> + }; >> + >> + eth_sleep_pins: eth-sleep-pins { >> + pins-cc { >> + pinmux = , >> + , >> + , >> + ; >> + }; >> + >> + pins-mdio { >> + pinmux = , >> + ; >> + bias-disable; >> + input-disable; >> + }; >> + >> + pins-rxd { >> + pinmux = , >> + , >> + , >> + ; >> + }; >> + >> + pins-txd { >> + pinmux = , >> + , >> + , >> + ; >> + }; >> + }; >> + >> + i2c2_pins: i2c2-pins { >> + pins-bus { >> + pinmux = , >> + ; >> + bias-pull-up = ; >> + drive-strength = <6>; >> + drive-strength-microamp = <1000>; >> + }; >> + }; >> + >> + i2c4_pins: i2c4-pins { >> + pins-bus { >> + pinmux = , >> + ; >> + bias-pull-up = ; >> + drive-strength-microamp = <1000>; >> + }; >> + }; >> + >> + i2c6_pins: i2c6-pins { >> + pins { >> + pinmux = , >> + ; >> + bias-pull-up = ; >> + }; >> + }; >> + >> + mmc0_default_pins: mmc0-default-pins { >> + pins-clk { >> + pinmux = ; >> + bias-pull-down = ; >> + drive-strength = <6>; >> + }; >> + >> + pins-cmd-dat { >> + pinmux = , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + ; >> + bias-pull-up = ; >> + drive-strength = <6>; >> + input-enable; >> + }; >> + >> + pins-rst { >> + pinmux = ; >> + bias-pull-up = ; >> + drive-strength = <6>; >> + }; >> + }; >> + >> + mmc0_uhs_pins: mmc0-uhs-pins { >> + pins-clk { >> + pinmux = ; >> + bias-pull-down = ; >> + drive-strength = <8>; >> + }; >> + >> + pins-cmd-dat { >> + pinmux = , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + ; >> + bias-pull-up = ; >> + drive-strength = <8>; >> + input-enable; >> + }; >> + >> + pins-ds { >> + pinmux = ; >> + bias-pull-down = ; >> + drive-strength = <8>; >> + }; >> + >> + pins-rst { >> + pinmux = ; >> + bias-pull-up = ; >> + drive-strength = <8>; >> + }; >> + }; >> + >> + mmc1_default_pins: mmc1-default-pins { >> + pins-clk { >> + pinmux = ; >> + bias-pull-down = ; >> + drive-strength = <8>; >> + }; >> + >> + pins-cmd-dat { >> + pinmux = , >> + , >> + , >> + , >> + ; >> + bias-pull-up = ; >> + drive-strength = <8>; >> + input-enable; >> + }; >> + }; >> + >> + mmc1_pins_detect: mmc1-detect-pins { >> + pins-insert { >> + pinmux = ; >> + bias-pull-up; >> + }; >> + }; >> + >> + mt6360_pins: mt6360-pins { >> + pins-irq { >> + pinmux = , >> + ; >> + input-enable; >> + bias-pull-up; >> + }; >> + }; >> + >> + pcie0_default_pins: pcie0-default-pins { >> + pins-bus { >> + pinmux = , >> + , >> + ; >> + bias-pull-up; >> + }; >> + }; >> + >> + pcie1_default_pins: pcie1-default-pins { >> + pins-bus { >> + pinmux = , >> + , >> + ; >> + bias-disable; >> + }; >> + }; >> + >> + spi1_pins: spi1-default-pins { >> + pins-bus { >> + pinmux = , >> + , >> + , >> + ; >> + bias-disable; >> + }; >> + }; >> + >> + spi2_pins: spi2-default-pins { >> + pins-bus { >> + pinmux = , >> + , >> + , >> + ; >> + bias-disable; >> + }; >> + }; >> + >> + uart0_pins: uart0-pins { >> + pins-bus { >> + pinmux = , >> + ; >> + }; >> + }; >> + >> + uart1_pins: uart1-pins { >> + pins-bus { >> + pinmux = , >> + ; >> + }; >> + }; >> + >> + wifi_vreg_pins: wifi-vreg-pins { >> + pins-wifi-pmu-en { >> + pinmux = ; >> + output-high; >> + }; >> + >> + pins-wifi-vreg-en { >> + pinmux = ; >> + }; >> + }; >> +}; >> + >> +&pcie0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pcie0_default_pins>; >> + status = "okay"; >> +}; >> + >> +&pcie1 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pcie1_default_pins>; >> + status = "okay"; >> +}; >> + >> +&pmic { >> + interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; >> +}; >> + >> +&scp { >> + memory-region = <&scp_mem>; >> + status = "okay"; >> +}; >> + >> +&spi1 { >> + /* Exposed at 40 pin connector */ >> + pinctrl-0 = <&spi1_pins>; >> + pinctrl-names = "default"; >> + mediatek,pad-select = <0>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + status = "okay"; >> +}; >> + >> +&spi2 { >> + /* Exposed at 40 pin connector */ >> + pinctrl-0 = <&spi2_pins>; >> + pinctrl-names = "default"; >> + mediatek,pad-select = <0>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + status = "okay"; >> +}; >> + >> +&spmi { >> + #address-cells = <2>; >> + #size-cells = <0>; >> + >> + mt6315_6: pmic@6 { >> + compatible = "mediatek,mt6315-regulator"; >> + reg = <0x6 SPMI_USID>; >> + >> + regulators { >> + mt6315_6_vbuck1: vbuck1 { >> + regulator-compatible = "vbuck1"; >> + regulator-name = "Vbcpu"; >> + regulator-min-microvolt = <300000>; >> + regulator-max-microvolt = <1193750>; >> + regulator-enable-ramp-delay = <256>; >> + regulator-allowed-modes = <0 1 2>; >> + regulator-always-on; >> + }; >> + }; >> + }; >> + >> + mt6315_7: pmic@7 { >> + compatible = "mediatek,mt6315-regulator"; >> + reg = <0x7 SPMI_USID>; >> + >> + regulators { >> + mt6315_7_vbuck1: vbuck1 { >> + regulator-compatible = "vbuck1"; >> + regulator-name = "Vgpu"; >> + regulator-min-microvolt = <300000>; >> + regulator-max-microvolt = <1193750>; >> + regulator-enable-ramp-delay = <256>; >> + regulator-allowed-modes = <0 1 2>; >> + }; >> + }; >> + }; >> +}; >> + >> +&uart0 { >> + /* Exposed at 40 pin connector */ >> + pinctrl-0 = <&uart0_pins>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&uart1 { >> + /* Exposed at 40 pin connector */ >> + pinctrl-0 = <&uart1_pins>; >> + pinctrl-names = "default"; >> + status = "okay"; >> +}; >> + >> +&ssusb0 { >> + role-switch-default-mode = "host"; >> + usb-role-switch; >> + vusb33-supply = <&mt6359_vusb_ldo_reg>; >> + status = "okay"; >> + >> + port { >> + mtu3_hs0_role_sw: endpoint { >> + remote-endpoint = <&typec_con_hs>; >> + }; >> + }; >> +}; >> + >> +&ssusb2 { >> + vusb33-supply = <&mt6359_vusb_ldo_reg>; >> + status = "okay"; >> +}; >> + >> +&xhci0 { >> + vbus-supply = <&otg_vbus_regulator>; >> + status = "okay"; >> +}; >> + >> +&xhci1 { >> + /* MT7921's USB Bluetooth has issues with USB2 LPM */ >> + usb2-lpm-disable; >> + vusb33-supply = <&mt6359_vusb_ldo_reg>; >> + vbus-supply = <&vsys>; >> + status = "okay"; >> +}; >> + >> +&xhci2 { >> + vbus-supply = <&vsys>; >> + status = "okay"; >> +};