Re: [PATCH 3/4] watchdog: s3c2410_wdt: parse watchdog dt node to read PMU registers adresses

[Tomasz Figa <tomasz.figa-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

On Friday 27 of September 2013 08:20:25 Doug Anderson wrote:
> Tomasz
> 
> On Fri, Sep 27, 2013 at 4:25 AM, Tomasz Figa <t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
> >> >> Since we already have PMU "driver" in mach-exynos, which already
> >> >> has
> >> >> suspend/resume syscore ops, what about placing such configuration
> >> >> there
> >> >> instead?
> >> > 
> >> > Any opinions on this?
> >> 
> >> In PMU we have control registers for other IPs (like USB, MIPI etc.,)
> >> also and I'm not sure where those registers are getting configured.
> >> If we want to configure WDT register in PMU driver then we have to
> >> consider configuring control regs for other IPs also and the DT node
> >> has to have all these control bit numbers. So instead of that I feel
> >> configuring it in WDT driver looks fine.
> > 
> > I believe this depends on possible use cases, not the IP block itself.
> > If this is just a low level initial (and SoC specific) initialization
> > that doesn't require any co-operation with high level kernel/userspace
> > APIs, then I think there is no need to entangle the driver for
> > watchdog
> > IP with SoC specific details outside the IP itself.
> > 
> > [Adding more people on Cc for further discussion.]
> 
> So isn't the register in the PMU there to save power in the case that
> the watchdog timer isn't being used?  How is the PMU "driver" to know
> whether the watchdog is being used?  Better IMHO that the watchdog
> driver knows to enable and disable itself as needed, right?

How much power can you save on one low frequency counter? Anyway, those 
bits look more like reset signal masks to me, unrelated to any power 
saving and even if, this driver switches them on at probe regardless of 
whether the watchdog is actually used or not.

Best regards,
Tomasz

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