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[82.149.13.182]) by smtp.gmail.com with ESMTPSA id o13-20020a05600c4fcd00b0040fccf7e8easm9123188wmq.36.2024.02.05.10.19.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 10:19:27 -0800 (PST) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Chen-Yu Tsai , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andre Przywara Cc: linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng Subject: Re: [PATCH v2 2/2] arm64: dts: allwinner: h618: add BananaPi M4 Berry board Date: Mon, 05 Feb 2024 19:19:26 +0100 Message-ID: <22174359.EfDdHjke4D@jernej-laptop> In-Reply-To: <20240204101054.152012-3-andre.przywara@arm.com> References: <20240204101054.152012-1-andre.przywara@arm.com> <20240204101054.152012-3-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Dne nedelja, 04. februar 2024 ob 11:10:54 CET je Andre Przywara napisal(a): > The BananaPi M4 Berry is a development board using the Allwinner H618 > SoC. It comes with the following specs: > - Allwinner H618 SoC (4 * Arm Cortex-A53 cores, 1MB L2 cache) > - 2 GiB LPDDR4 DRAM > - 8 GiB eMMC flash > - AXP313a PMIC > - Gigabit Ethernet, using RTL8211 PHY > - RTL8821CU USB WiFi chip > - HDMI port > - 4 * USB 2.0 ports, via an on-board hub chip > - microSD card slot > - 3.5mm A/V port > - power supply and USB-OTG via USB-C connector > > Add a devicetree file describing the components that we already have > bindings for, that excludes audio and video at the moment. > > Signed-off-by: Andre Przywara > --- > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../sun50i-h618-bananapi-m4-berry.dts | 223 ++++++++++++++++++ > 2 files changed, 224 insertions(+) > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts > > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile > index 2db3b15ad09f..1c5c204a109b 100644 > --- a/arch/arm64/boot/dts/allwinner/Makefile > +++ b/arch/arm64/boot/dts/allwinner/Makefile > @@ -43,5 +43,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-berry.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts > new file mode 100644 > index 000000000000..a3f8ff75db42 > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts > @@ -0,0 +1,223 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2023 Arm Ltd. > + */ > + > +/dts-v1/; > + > +#include "sun50i-h616.dtsi" > + > +#include > +#include > +#include > +#include > + > +/ { > + model = "BananaPi M4 Berry"; > + compatible = "sinovoip,bananapi-m4-berry", "allwinner,sun50i-h618"; > + > + aliases { > + ethernet0 = &emac0; > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-0 { > + function = LED_FUNCTION_STATUS; > + color = ; > + gpios = <&pio 2 12 GPIO_ACTIVE_LOW>; /* PC12 */ > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + key-sw3 { > + label = "sw3"; > + linux,code = ; > + gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ > + }; > + }; > + > + reg_vcc5v: regulator-5v { > + /* board wide 5V supply directly from the USB-C socket */ > + compatible = "regulator-fixed"; > + regulator-name = "vcc-5v"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + }; > + > + reg_usb_vbus: regulator-usb-vbus { > + /* separate discrete regulator for the USB ports */ > + compatible = "regulator-fixed"; > + regulator-name = "usb-vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <®_vcc5v>; > + }; > + > + reg_3v3: regulator-3v3 { > + /* separate discrete regulator for WiFi and Ethernet PHY */ > + compatible = "regulator-fixed"; > + regulator-name = "vcc-3v3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <®_vcc5v>; > + }; > +}; > + > +&cpu0 { > + cpu-supply = <®_dcdc2>; > +}; > + > +/* Connected to an on-board RTL8821CU USB WiFi chip. */ > +&ehci1 { > + status = "okay"; > +}; > + > +/* EHCI2 is on unpopulated pins */ > + > +/* Connected to an on-board FE1.1s USB hub chip, supplying 4 USB-A ports. */ > +&ehci3 { > + status = "okay"; > +}; > + > +&emac0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&ext_rgmii_pins>; > + phy-mode = "rgmii"; > + phy-handle = <&ext_rgmii_phy>; > + phy-supply = <®_3v3>; > + allwinner,rx-delay-ps = <3100>; > + allwinner,tx-delay-ps = <700>; > + status = "okay"; > +}; > + > +&ir { > + status = "okay"; > +}; > + > +&mdio0 { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + reset-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */ > + }; > +}; > + > +&mmc0 { > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ > + vmmc-supply = <®_dldo1>; > + bus-width = <4>; > + status = "okay"; > +}; > + > +&mmc2 { > + vmmc-supply = <®_dldo1>; > + vqmmc-supply = <®_aldo1>; > + bus-width = <8>; > + non-removable; > + cap-mmc-hw-reset; > + mmc-ddr-1_8v; This one should be dropped. Best regards, Jernej > + mmc-hs200-1_8v; > + status = "okay"; > +}; > + > +/* USB ports 1 and 3 connect to onboard devices that are high-speed only. */ > + > +/* OHCI2 is on unpopulated pins */ > + > +&pio { > + vcc-pc-supply = <®_aldo1>; > + vcc-pf-supply = <®_dldo1>; > + vcc-pg-supply = <®_dldo1>; > + vcc-ph-supply = <®_dldo1>; > + vcc-pi-supply = <®_dldo1>; > +}; > + > +&r_i2c { > + status = "okay"; > + > + axp313: pmic@36 { > + compatible = "x-powers,axp313a"; > + reg = <0x36>; > + #interrupt-cells = <1>; > + interrupt-controller; > + interrupt-parent = <&pio>; > + > + vin1-supply = <®_vcc5v>; > + vin2-supply = <®_vcc5v>; > + vin3-supply = <®_vcc5v>; > + > + regulators { > + reg_aldo1: aldo1 { > + regulator-always-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc-1v8-pll"; > + }; > + > + reg_dldo1: dldo1 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-3v3-io"; > + }; > + > + reg_dcdc1: dcdc1 { > + regulator-always-on; > + regulator-min-microvolt = <810000>; > + regulator-max-microvolt = <990000>; > + regulator-name = "vdd-gpu-sys"; > + }; > + > + reg_dcdc2: dcdc2 { > + regulator-always-on; > + regulator-min-microvolt = <810000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vdd-cpu"; > + }; > + > + reg_dcdc3: dcdc3 { > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vdd-dram"; > + }; > + }; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_ph_pins>; > + status = "okay"; > +}; > + > +&usbotg { > + /* > + * PHY0 pins are connected to a USB-C socket, but a role switch is not > + * implemented: both CC pins are pulled to GND via a 5.1K resistor. > + * The VBUS pins power the device, so a fixed peripheral mode > + * is the best choice. > + * The board can be powered via GPIOs, in this case port0 *can* > + * act as a host (with a cable/adapter ignoring CC), as VBUS is > + * then provided by the GPIOs. Any user of this setup would > + * need to adjust the DT accordingly: dr_mode set to "host", > + * enabling OHCI0 and EHCI0. > + */ > + dr_mode = "peripheral"; > + status = "okay"; > +}; > + > +&usbphy { > + usb3_vbus-supply = <®_usb_vbus>; > + status = "okay"; > +}; >