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Wed, 07 Oct 2026 02:29:21 -0700 (PDT) X-Received: by 2002:a17:902:d54c:b0:2dd:ad73:5b68 with SMTP id d9443c01a7336-2e60036c99cmr14983115ad.24.1791365360897; Wed, 07 Oct 2026 02:29:20 -0700 (PDT) Received: from [10.218.18.193] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e604720e81sm7335615ad.36.2026.10.07.02.29.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 07 Oct 2026 02:29:20 -0700 (PDT) Message-ID: <223555e8-f17c-4bd7-abe5-06d8f4406867@oss.qualcomm.com> Date: Wed, 7 Oct 2026 14:59:14 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/4] ASoC: cdns: Add Cadence I2S-SC controller driver To: joakim.zhang@cixtech.com, lgirdwood@gmail.com, broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: cix-kernel-upstream@cixtech.com, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20260928053613.2158446-1-joakim.zhang@cixtech.com> <20260928053613.2158446-3-joakim.zhang@cixtech.com> Content-Language: en-US From: Ajay Kumar Nandam In-Reply-To: <20260928053613.2158446-3-joakim.zhang@cixtech.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: -8eHDs88pHnsDOWsvZtcfhR2qh-zi5jI X-Authority-Analysis: v=2.4 cv=ZZiIpcVA c=1 sm=1 tr=0 ts=6ac610f2 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=TAThrSAKAAAA:8 a=v9BIAvi8InMdnKEPHzMA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 a=8BaDVV8zVhUtoWX9exhy:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA3MDAzNyBTYWx0ZWRfX3j/R6Ug/CUgv Wjob9xrTf8LpUFcUNagslF14I8Q39+4iUTaIGWZX3anbWs8npTJJV/JvILrS1bBqlgflu1OfTov +MTPGNaQIvi5UMz4gwf6fUo2zz8TP3c= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA3MDAzNyBTYWx0ZWRfX5DJrH/Nxbg3r QjTOV+UQ4+42wluWA+UBvTSyupCkCh7UJJTNQA85TA6LPrlithuQ+Vof6MxKC3WGBsyXMLdzJEZ iMxDqxIA8n67r++aDDOiyPIVV1/in9Id3rHE2IPBJhTtATswL+rhiDTitH4mVq14RlLsFjIPy9P hdIYpe7EQFx1euXjYj6m96E39dDmDW+5pwW7CzD6HgUP4OkmnA1okRSiHR7XiahgeLxs5hn/zLE Y9AlhpgHytZSyxjrNPnvEnQjnAU29Veh3PNnLkt0e0ct1+ur9w5ookECc2z2EfxK20ySCd4UhEc VYWFR8v/fhvOiplmTyiI7gvMA8KzFcJfVAfOEE3/lcNprpOvvXyZyaq+4CNnBV8CYtt6wbW1wbL /PSRKElVMFUhEOE4o64uM1oxc//DYdEn8qSVsVPO5MmIbXAQ6bQbrLeKPuAUcmzDJYtSsFkbtcp bhx7h8O8504LODdBB9w== X-Proofpoint-ORIG-GUID: -8eHDs88pHnsDOWsvZtcfhR2qh-zi5jI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-07_03,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610070037 On 9/28/2026 11:06 AM, joakim.zhang@cixtech.com wrote: > From: Joakim Zhang > > Add support for the Cadence I2S-SC controller found in the CIX SKY1 > audio subsystem. > > The controller provides full-duplex stereo playback and capture in > standard I2S, left/right-justified and DSP modes, with mono operation > mapped onto the left audio channel. It also supports TDM operation > with up to 16 slots per frame, where the PCM channels map onto the > active slots of the stream direction while the bit clock covers the > whole frame. > > The transmitter and receiver share the transceiver enable sequence, > so the start/stop state machine is serialized with a spinlock against > independently triggered playback and capture PCMs. The driver > registers the dmaengine PCM helper, selects the audio reference clock > parent for the 8 kHz or 11.025 kHz sample rate family and keeps the > minimum functional-clock to bit-clock ratio required for safe clock > domain crossing. Runtime and system suspend/resume restore the > registers through the regcache. > > Signed-off-by: Joakim Zhang > --- > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +static int cdns_i2s_sc_clks_enable(struct cdns_i2s_sc_priv *i2s_sc_priv) > +{ > + int ret; > + > + ret = clk_prepare_enable(i2s_sc_priv->clk_hst); > + if (ret) > + return ret; > + > + ret = clk_prepare_enable(i2s_sc_priv->clk_i2s); > + if (ret) > + clk_disable_unprepare(i2s_sc_priv->clk_hst); > + > + return ret; > +} > + > +static void cdns_i2s_sc_clks_disable(struct cdns_i2s_sc_priv *i2s_sc_priv) > +{ > + clk_disable_unprepare(i2s_sc_priv->clk_i2s); > + clk_disable_unprepare(i2s_sc_priv->clk_hst); > +} > + > +static void cdns_i2s_sc_rxtx_common_config(struct cdns_i2s_sc_priv *i2s_sc_priv, bool on) > +{ > + if (on) { > + /* Full-duplex mode enable */ > + regmap_update_bits(i2s_sc_priv->regmap, I2S_CTRL_FDX, > + I2S_CTRL_FDX_FULL_DUPLEX, I2S_CTRL_FDX_FULL_DUPLEX); > + > + if (i2s_sc_priv->is_tdm_mode) { > + /* TDM mode enable */ > + regmap_update_bits(i2s_sc_priv->regmap, I2S_TDM_CTRL, > + I2S_TDM_CTRL_TDM_EN, I2S_TDM_CTRL_TDM_EN); > + > + /* Number of supported audio channels in TDM mode */ > + regmap_update_bits(i2s_sc_priv->regmap, I2S_TDM_CTRL, > + I2S_TDM_CTRL_CHN_NO, > + FIELD_PREP(I2S_TDM_CTRL_CHN_NO, > + i2s_sc_priv->tdm_config.slots - 1)); This driver uses FIELD_PREP() in several register programming paths, but it does not include . A local targeted build with M=sound/soc/cdns W=1 fails with: error: implicit declaration of function 'FIELD_PREP' Please add the explicit bitfield.h include. After adding that include locally, cdns-i2s-sc.c gets past this compile error. > + > + /* TDM mode channels enable */ > + regmap_update_bits(i2s_sc_priv->regmap, I2S_TDM_CTRL, I2S_TDM_CTRL_CHN_EN, > + FIELD_PREP(I2S_TDM_CTRL_CHN_EN, > + i2s_sc_priv->tdm_config.rx_mask | > + i2s_sc_priv->tdm_config.tx_mask)); > + } > + ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); > + if (ret) > + return dev_err_probe(&pdev->dev, ret, > + "Failed to register dmaengine component\n"); > + > + pm_runtime_get_noresume(&pdev->dev); > + pm_runtime_set_active(&pdev->dev); > + ret = devm_pm_runtime_enable(&pdev->dev); > + if (ret) > + return dev_err_probe(&pdev->dev, ret, "Failed to enable runtime PM\n"); > + > + ret = cdns_i2s_sc_clks_enable(i2s_sc_priv); > + if (ret) { > + dev_err_probe(&pdev->dev, ret, "Failed to enable clocks\n"); > + pm_runtime_put_noidle(&pdev->dev); > + return ret; > + } > + After cdns_i2s_sc_clks_enable() succeeds, the platform_get_irq() failure path returns directly without disabling the clocks or dropping the runtime PM usage count. The devm_request_irq() failure path has a similar issue: it calls pm_runtime_put_noidle(), but that will not run the runtime suspend callback, so the clocks enabled manually above remain prepared/enabled. Thanks Ajay Kumar Nandam > + cdns_i2s_sc_rst(i2s_sc_priv); > + > + irq = platform_get_irq(pdev, 0); > + if (irq < 0) > + return irq; > + i2s_sc_priv->irq = irq; > + > + ret = devm_request_irq(&pdev->dev, irq, cdns_i2s_sc_isr, 0, > + dev_name(&pdev->dev), i2s_sc_priv); > + if (ret) { > + dev_err(&pdev->dev, "Failed to request irq: %d\n", ret); > + pm_runtime_put_noidle(&pdev->dev); > + return ret; > + }