Re: Question regarding clocks in the DW-HDMI DT bindings

From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeauraro.org>,
	dri-devel@lists.freedesktop.org, nickey.yang@rock-chips.com,
	Andy Yan <andy.yan@rock-chips.com>
Subject: Re: Question regarding clocks in the DW-HDMI DT bindings
Date: Mon, 05 Dec 2016 08:52:35 +0200	[thread overview]
Message-ID: <2270604.fDeBBfczLL@avalon> (raw)
In-Reply-To: <20b0652b-f5b9-ad57-ac01-3517a6c74534@mentor.com>

Hi Vladimir,

On Saturday 03 Dec 2016 23:10:35 Vladimir Zapolskiy wrote:
> On 12/03/2016 07:16 PM, Laurent Pinchart wrote:
> > On Friday 25 Nov 2016 13:29:37 Fabio Estevam wrote:
> >> On Fri, Nov 25, 2016 at 1:22 PM, Laurent Pinchart wrote:
> >>>> I got the clock name from I.MX6Q TRM, I also checked the name again
> >>>> with Rockchip IC design team now, hope to get some new information
> >>>> soon.
> >>> 
> >>> Thank you. While at it, could you ask them which version of the DW HDMI
> >>> IP used in the SoC ?
> >> 
> >> DW HDMI IP used in Rockchip is:
> >> dwhdmi-rockchip ff980000.hdmi: Detected HDMI controller
> >> 0x20:0xa:0xa0:0xc1
> >> 
> >> as shown at
> >> https://storage.kernelci.org/mainline/v4.9-rc6-157-g16ae16c6e561/
> >> arm-multi_v7_defconfig/lab-collabora/boot-rk3288-rock2-square_rootfs:
> >> nfs.html
> >> 
> >> DW HDMI IP used  on mx6q is:
> >> dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1
> > 
> > Would you be able to print the value of the CONFIG[0-3]_ID registers as
> > well ? I'm also interested in the same information for RK3288, as well as
> > for IMX6DL.
>               i.MX6Q    i.MX6DL
> DESIGN_ID     0x13      0x13
> REVISION_ID   0x0a      0x1a    <--- the only difference
> PRODUCT_ID0   0xa0      0xa0
> PRODUCT_ID1   0xc1      0xc1
> CONFIG0_ID    0x8f      0x8f
> CONFIG1_ID    0x01      0x01
> CONFIG2_ID    0xf2      0xf2    <--- HDMI 3D TX PHY
> CONFIG3_ID    0x02      0x02
> 
> I'm not sure, if i.MX6D and MX6S have the same DW HDMI IP as on i.MX6Q
> and i.MXDL respectively, and I don't have i.MX6DP or i.MX6QP powered board
> on hand to dump the registers.

Thank you for the information. Here are the HDMI TX versions I've found so 
far.

Allwinner H3/A64/A80		1.32a
Freescale i.MX6Q		1.30a
Freescale i.MX6DL		1.31a
Renesas R-Car H3		2.01a
Rockchip RK3288			2.00a

It would be useful to know what the other Freescale i.MX6 SoCs contain and 
whether they're subject to the HDMI errata worked around by the 
dw_hdmi_clear_overflow() function (ERR004308 "HDMI: 8000504668 — The 
arithmetic unit may get wrong video timing values although the FC_* registers 
hold correct values"). However, unless I'm mistaken only i.MX6DL and i.MX6Q 
have upstream support for HDMI output, so it might be difficult to find this 
out at the moment.

If we could establish that the problem isn't specific to Freescale but affects 
all 1.30a and 1.31a revisions, we could enable the workaround dynamically 
based on runtime identification. I've tested R-Car H3 without the workaround 
and haven't noticed the problem explained by Russell (magenta line on the left 
side of the image) or any other issue. Could someone test this on Rockchip 
RK3288 ?

-- 
Regards,

Laurent Pinchart

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