[PATCH v1 0/3] mailbox: rockchip: Add mailbox driver for Rockchip platform

[PATCH v1 0/3] mailbox: rockchip: Add mailbox driver for Rockchip platform

[Caesar Wang]

Mailbox is used by the Rockchip CPU cores to communicate
requests to MCU processor.

This driver is found on RK3368 SoCs.

The Mailbox module is a simple APB peripheral that allows both
the Cortex-A53 MCU system to communicate by writing operation to
generate interrupt.
The registers are accessible by both CPU via APB interface.

Tested on RK3368 SDK board.


Changes in v1:
- PATCH[1/3] doc:
- As the Rob Herring comments, s/share/shared/ and specify the value of #mbox-cells.
- Move the shared memory in mailbox, let's move the property the client
  driver in the future.
- PATCH[2/3] driver:
- The commit: %s/@/(num order).
- Add the module authors to instead of the notes.
- Add the COMPILE_TEST to auto compile test in Kconfig.
- Let the chan_to_idx() trys to instead of rockchip_mbox_chan.idx.
- Let's enable/disable the interrupt in startup/shutdown.
- Move the share memory and tx buf into the client drivers.
- PATCH[3/3] dts:
- fix "processormZ"--> "processor",the miss-fingerboard.
- Remove the shared memory in mailbox controller dtsi.

Caesar Wang (3):
  dt-bindings: rockchip-mailbox: Add mailbox controller document on
    Rockchip SoCs
  mailbox: rockchip: Add Rockchip mailbox driver
  ARM64: dts: rk3368: Add mailbox device nodes

 .../bindings/mailbox/rockchip-mailbox.txt          |  32 +++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  12 +
 drivers/mailbox/Kconfig                            |   9 +
 drivers/mailbox/Makefile                           |   2 +
 drivers/mailbox/rockchip-mailbox.c                 | 286 +++++++++++++++++++++
 5 files changed, 341 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
 create mode 100644 drivers/mailbox/rockchip-mailbox.c

-- 
1.9.1

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[PATCH v1 1/3] dt-bindings: rockchip-mailbox: Add mailbox controller document on Rockchip SoCs

[Caesar Wang]

This add the necessary binding documentation for mailbox
found on RK3368 SoC.

Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

Changes in v1:
- PATCH[1/3] doc:
- As the Rob Herring comments, s/share/shared/ and specify the value of #mbox-cells.
- Move the shared memory in mailbox, let's move the property the client
  driver in the future.

 .../bindings/mailbox/rockchip-mailbox.txt          | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt

diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
new file mode 100644
index 0000000..b6bb84a
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
@@ -0,0 +1,32 @@
+Rockchip mailbox
+
+The Rockchip mailbox is used by the Rockchip CPU cores to communicate
+requests to MCU processor.
+
+Refer to ./mailbox.txt for generic information about mailbox device-tree
+bindings.
+
+Required properties:
+
+ - compatible: should be one of the following.
+   - "rockchip,rk3368-mbox" for rk3368
+ - reg: physical base address of the controller and length of memory mapped
+	region.
+ - interrupts: The interrupt number to the cpu. The interrupt specifier format
+	depends on the interrupt controller.
+ - #mbox-cells: Common mailbox binding property to identify the number
+	of cells required for the mailbox specifier. Should be 1
+
+Example:
+--------
+
+/* RK3368 */
+mbox: mbox@ff6b0000 {
+	compatible = "rockchip,rk3368-mailbox";
+	reg = <0x0 0xff6b0000 0x0 0x1000>,
+	interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+		     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+	#mbox-cells = <1>;
+};
-- 
1.9.1

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Re: [PATCH v1 1/3] dt-bindings: rockchip-mailbox: Add mailbox controller document on Rockchip SoCs

[Rob Herring]

On Tue, Oct 27, 2015 at 2:31 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> This add the necessary binding documentation for mailbox
> found on RK3368 SoC.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v1:
> - PATCH[1/3] doc:
> - As the Rob Herring comments, s/share/shared/ and specify the value of #mbox-cells.
> - Move the shared memory in mailbox, let's move the property the client
>   driver in the future.

Acked-by: Rob Herring <robh@kernel.org>

>
>  .../bindings/mailbox/rockchip-mailbox.txt          | 32 ++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
>
> diff --git a/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
> new file mode 100644
> index 0000000..b6bb84a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/rockchip-mailbox.txt
> @@ -0,0 +1,32 @@
> +Rockchip mailbox
> +
> +The Rockchip mailbox is used by the Rockchip CPU cores to communicate
> +requests to MCU processor.
> +
> +Refer to ./mailbox.txt for generic information about mailbox device-tree
> +bindings.
> +
> +Required properties:
> +
> + - compatible: should be one of the following.
> +   - "rockchip,rk3368-mbox" for rk3368
> + - reg: physical base address of the controller and length of memory mapped
> +       region.
> + - interrupts: The interrupt number to the cpu. The interrupt specifier format
> +       depends on the interrupt controller.
> + - #mbox-cells: Common mailbox binding property to identify the number
> +       of cells required for the mailbox specifier. Should be 1
> +
> +Example:
> +--------
> +
> +/* RK3368 */
> +mbox: mbox@ff6b0000 {
> +       compatible = "rockchip,rk3368-mailbox";
> +       reg = <0x0 0xff6b0000 0x0 0x1000>,
> +       interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> +                    <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
> +                    <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
> +                    <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> +       #mbox-cells = <1>;
> +};
> --
> 1.9.1
>

[PATCH v1 3/3] ARM64: dts: rk3368: Add mailbox device nodes

[Caesar Wang]

This adds mailbox device nodes in dts.

Mailbox is used by the Rockchip CPU cores to communicate
requests to MCU processor.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v1:
- PATCH[3/3] dts:
- fix "processormZ"--> "processor",the miss-fingerboard.
- Remove the shared memory in mailbox controller dtsi.

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cc093a4..cefdad3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -484,6 +484,18 @@
 		status = "disabled";
 	};
 
+	mbox: mbox@ff6b0000 {
+		compatible = "rockchip,rk3368-mailbox";
+		reg = <0x0 0xff6b0000 0x0 0x1000>,
+		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MAILBOX>;
+		clock-names = "pclk_mailbox";
+		#mbox-cells = <1>;
+	};
+
 	pmugrf: syscon@ff738000 {
 		compatible = "rockchip,rk3368-pmugrf", "syscon";
 		reg = <0x0 0xff738000 0x0 0x1000>;
-- 
1.9.1

Re: [PATCH v1 3/3] ARM64: dts: rk3368: Add mailbox device nodes

[kbuild test robot]

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Hi Caesar,

[auto build test ERROR on rockchip/for-next -- if it's inappropriate base, please suggest rules for selecting the more suitable base]

url:    https://github.com/0day-ci/linux/commits/Caesar-Wang/mailbox-rockchip-Add-mailbox-driver-for-Rockchip-platform/20151027-153608
config: arm64-allyesconfig (attached as .config)
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm64 

All errors (new ones prefixed by >>):

>> Error: arch/arm64/boot/dts/rockchip/rk3368.dtsi:490.3-4 syntax error
   FATAL ERROR: Unable to parse input tree

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 45779 bytes --]

Re: [PATCH v1 3/3] ARM64: dts: rk3368: Add mailbox device nodes

[Caesar Wang]

[-- Attachment #1: Type: text/plain, Size: 1382 bytes --]

Hi smart robot,

在 2015年10月28日 04:33, kbuild test robot 写道:
> Hi Caesar,
>
> [auto build test ERROR on rockchip/for-next -- if it's inappropriate base, please suggest rules for selecting the more suitable base]
>
> url:    https://github.com/0day-ci/linux/commits/Caesar-Wang/mailbox-rockchip-Add-mailbox-driver-for-Rockchip-platform/20151027-153608
> config: arm64-allyesconfig (attached as .config)
> reproduce:
>          wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
>          chmod +x ~/bin/make.cross
>          # save the attached .config to linux build tree
>          make.cross ARCH=arm64
>
> All errors (new ones prefixed by >>):
>
>>> Error: arch/arm64/boot/dts/rockchip/rk3368.dtsi:490.3-4 syntax error
>     FATAL ERROR: Unable to parse input tree
>
Thanks for pointing out my figner wrong.

-	reg = <0x0 0xff6b0000 0x0 0x1000>,
+	reg = <0x0 0xff6b0000 0x0 0x1000>;


> ---
> 0-DAY kernel test infrastructure                Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
> [attachment]
>
> .config.gz
> download: http://u.163.com/t0/av3utwEyL
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip


[-- Attachment #2: Type: text/html, Size: 2821 bytes --]

Re: [PATCH v1 3/3] ARM64: dts: rk3368: Add mailbox device nodes

[Caesar Wang]

于 2015年10月27日 15:31, Caesar Wang 写道:
> This adds mailbox device nodes in dts.
>
> Mailbox is used by the Rockchip CPU cores to communicate
> requests to MCU processor.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v1:
> - PATCH[3/3] dts:
> - fix "processormZ"--> "processor",the miss-fingerboard.
> - Remove the shared memory in mailbox controller dtsi.
>
>   arch/arm64/boot/dts/rockchip/rk3368.dtsi | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index cc093a4..cefdad3 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -484,6 +484,18 @@
>   		status = "disabled";
>   	};
>   
> +	mbox: mbox@ff6b0000 {
> +		compatible = "rockchip,rk3368-mailbox";
> +		reg = <0x0 0xff6b0000 0x0 0x1000>,
s/,/;
> +		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru PCLK_MAILBOX>;
> +		clock-names = "pclk_mailbox";
> +		#mbox-cells = <1>;
> +	};
> +
>   	pmugrf: syscon@ff738000 {
>   		compatible = "rockchip,rk3368-pmugrf", "syscon";
>   		reg = <0x0 0xff738000 0x0 0x1000>;

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Re: [PATCH v1 3/3] ARM64: dts: rk3368: Add mailbox device nodes

[Heiko Stübner]

Am Dienstag, 27. Oktober 2015, 15:31:46 schrieb Caesar Wang:
> This adds mailbox device nodes in dts.
> 
> Mailbox is used by the Rockchip CPU cores to communicate
> requests to MCU processor.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

applied to my dts64 branch for 4.7

Thanks
Heiko