From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67B92F51C for ; Thu, 5 Oct 2023 15:30:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91A1DB2A2; Thu, 5 Oct 2023 08:30:37 -0700 (PDT) Received: from i53875a3c.versanet.de ([83.135.90.60] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1qoQJ3-0006a1-Rc; Thu, 05 Oct 2023 17:30:29 +0200 From: Heiko Stuebner To: Benjamin Gaignard , Sebastian Reichel Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH] arm64: dts: rockchip: rk3588is: Add AV1 decoder node Date: Thu, 05 Oct 2023 17:30:29 +0200 Message-ID: <2298521.ElGaqSPkdT@phil> In-Reply-To: <20231005151210.nqdx2uoixqjhrtrx@mercury.elektranox.org> References: <20231005145420.169594-1-benjamin.gaignard@collabora.com> <20231005151210.nqdx2uoixqjhrtrx@mercury.elektranox.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_PASS, T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Am Donnerstag, 5. Oktober 2023, 17:12:10 CEST schrieb Sebastian Reichel: > Hi, > > On Thu, Oct 05, 2023 at 04:54:20PM +0200, Benjamin Gaignard wrote: > > Add node for AV1 video decoder. > > > > Signed-off-by: Benjamin Gaignard > > Signed-off-by: Sebastian Reichel > > No need for my SoB. Instead have this one: > > Reviewed-by: Sebastian Reichel > > Also worth mentioning, that this Patch needs one small fix in the DT > binding (adding "resets") and one small fix in the driver for out of > the box AV1 support: > > https://lore.kernel.org/all/20231005144934.169356-1-benjamin.gaignard@collabora.com/ > https://lore.kernel.org/all/20231005145116.169411-1-benjamin.gaignard@collabora.com/ additionally the node name should be generic. The phandle can of course be av1d but the node name itself needs a change. Heiko > > --- > > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > index 5544f66c6ff4..835e66d85d5f 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > @@ -2304,6 +2304,20 @@ gpio4: gpio@fec50000 { > > #interrupt-cells = <2>; > > }; > > }; > > + > > + av1d: av1d@fdc70000 { > > + compatible = "rockchip,rk3588-av1-vpu"; > > + reg = <0x0 0xfdc70000 0x0 0x800>; > > + interrupts = ; > > + interrupt-names = "vdpu"; > > + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > > + clock-names = "aclk", "hclk"; > > + assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > > + assigned-clock-rates = <400000000>, <400000000>; > > + resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; > > + power-domains = <&power RK3588_PD_AV1>; > > + status = "okay"; > > + }; > > }; > > > > #include "rk3588s-pinctrl.dtsi" >