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From: "Heiko Stübner" <heiko@sntech.de>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>
Cc: Elaine Zhang <zhangqing@rock-chips.com>,
	Kever Yang <kever.yang@rock-chips.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	huangtao@rock-chips.com, andy.yan@rock-chips.com,
	Michal Tomek <mtdev79b@gmail.com>, Ilya K <me@0upti.me>,
	Chad LeClair <leclair@gmail.com>,
	devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>,
	kernel@collabora.com
Subject: Re: [PATCH v9 6/7] clk: rockchip: implement linked gate clock support
Date: Mon, 02 Sep 2024 16:03:56 +0200	[thread overview]
Message-ID: <2299897.AOvM4ru3NT@diego> (raw)
In-Reply-To: <20240325193609.237182-7-sebastian.reichel@collabora.com>

Am Montag, 25. März 2024, 20:33:37 CEST schrieb Sebastian Reichel:
> Recent Rockchip SoCs have a new hardware block called Native Interface
> Unit (NIU), which gates clocks to devices behind them. These clock
> gates will only have a running output clock when all of the following
> conditions are met:
> 
> 1. the parent clock is enabled
> 2. the enable bit is set correctly
> 3. the linked clock is enabled
> 
> To handle them this code registers them as a normal gate type clock,
> which takes care of condition 1 + 2. The linked clock is handled by
> using runtime PM clocks. Handling it via runtime PM requires setting
> up a struct device for each of these clocks with a driver attached
> to use the correct runtime PM operations. Thus the complete handling
> of these clocks has been moved into its own driver.
> 
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>

> +static void rk_clk_gate_link_remove(struct platform_device *pdev)
> +{
> +	struct rockchip_gate_link_platdata *pdata;
> +	struct device *dev = &pdev->dev;
> +	struct clk *clk, *linked_clk;
> +
> +	pdata = dev_get_platdata(dev);
> +	clk = rockchip_clk_get_lookup(pdata->ctx, pdata->clkbr->id);
> +	linked_clk = rockchip_clk_get_lookup(pdata->ctx, pdata->clkbr->linked_clk_id);
> +	rockchip_clk_set_lookup(pdata->ctx, ERR_PTR(-ENODEV), pdata->clkbr->id);
> +	clk_unregister_gate(clk);
> +	pm_clk_remove_clk(dev, linked_clk);
> +}
> +
> +static const struct dev_pm_ops rk_clk_gate_link_pm_ops = {
> +	SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
> +};
> +
> +struct platform_driver rk_clk_gate_link_driver = {
> +	.probe		= rk_clk_gate_link_probe,
> +	.remove_new	= rk_clk_gate_link_remove,

what's the use-case for remove?

We don't allow the main clock driver to be unbound, so I guess we might
want to do the same here? On a system-level they're getting registered
automatically but never unregistered, so the only case here would be
a manual unbind - but I'd think that would cause mayhem anyway?




  reply	other threads:[~2024-09-02 14:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-25 19:33 [PATCH v9 0/7] rockchip: clk: add GATE_LINK support Sebastian Reichel
2024-03-25 19:33 ` [PATCH v9 1/7] clk: rockchip: rk3588: drop unused code Sebastian Reichel
2024-03-25 19:33 ` [PATCH v9 2/7] clk: rockchip: handle missing clocks with -EPROBE_DEFER Sebastian Reichel
2024-08-31 10:48   ` Heiko Stübner
2024-03-25 19:33 ` [PATCH v9 3/7] clk: rockchip: rk3588: register GATE_LINK later Sebastian Reichel
2024-03-25 19:33 ` [PATCH v9 4/7] clk: rockchip: expose rockchip_clk_set_lookup Sebastian Reichel
2024-03-25 19:33 ` [PATCH v9 5/7] clk: rockchip: fix error for unknown clocks Sebastian Reichel
2024-03-25 19:33 ` [PATCH v9 6/7] clk: rockchip: implement linked gate clock support Sebastian Reichel
2024-09-02 14:03   ` Heiko Stübner [this message]
2024-03-25 19:33 ` [PATCH v9 7/7] clk: rockchip: rk3588: drop RK3588_LINKED_CLK Sebastian Reichel
2024-08-30 15:13 ` (subset) [PATCH v9 0/7] rockchip: clk: add GATE_LINK support Heiko Stuebner

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