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([2a02:810d:15c0:828:52e:24ce:bbc1:127d]) by smtp.gmail.com with ESMTPSA id b5-20020a170906194500b0094aa087578csm874138eje.171.2023.05.05.05.26.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 May 2023 05:26:49 -0700 (PDT) Message-ID: <231b4a1d-3f96-f53e-4741-5d3ca184c150@linaro.org> Date: Fri, 5 May 2023 14:26:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 Subject: Re: [EXT] Re: [PATCH 1/2 v5] dt-bindings: watchdog: marvell GTI system watchdog driver Content-Language: en-US To: Bharat Bhushan , "wim@linux-watchdog.org" , "linux@roeck-us.net" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "linux-watchdog@vger.kernel.org" , "devicetree@vger.kernel.org" References: <20230503121016.6093-1-bbhushan2@marvell.com> <9911bb17-e8f7-b552-7056-a26b3194c416@linaro.org> <731e99e6-9e48-8f80-7f95-ec8d23a85252@linaro.org> <72205e59-f535-cba1-dc65-544f919b7b6b@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 05/05/2023 14:19, Bharat Bhushan wrote: >>>>> Query to firmware required arm SMC call, to me that does not look >>>>> correct >>>> approach. Thought of using first one but that is already used and >>>> moving that is as same as this. >>>>> >>>>> Hardcoding to 63 will make it work on some SoCs but not all. >>>> >>>> But you know which one is started or is not. GTI_CWD_WDOG tells you this. >>> >>> On a given SoC, Firmware can reserve and/or use one or more timer for some >> other use case (customer use) and configure one of the timer as watchdog timer. >> Linux have to use the configured timer only and cannot decide by its own. >> >> Then the SoCs which have such firmware could use proposed property. >> Provide some rationale property description in your next version (adding >> necessary compatibles). > > Will add compatible as below: > > properties: > compatible: > enum: > - marvell,cn10k-wdt > - marvell,octeontx2-wdt And the rest? You said you have 10 SoCs. You made them not compatible with each other, so I assume on purpose and your driver will make use of it. > > And define this as optional property > marvell,wdt-timer-index: > $ref: /schemas/types.yaml#/definitions/uint32 > minimum: 0 > maximum: 63 > description: > An SoC have many timers (up to 64), firmware can reserve one or more timer > for some other use case and configures one of the global timer as watchdog > timer. Firmware will update this field with the timer number configured > as watchdog timer. Looks ok. Best regards, Krzysztof