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([2a01:e0a:106d:1080:2f62:6d3:721b:8c9e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48b380facfesm8184812f8f.23.2026.10.02.12.29.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 Oct 2026 12:29:48 -0700 (PDT) Message-ID: <23235204-8e5f-4fa7-a900-66acfcfc593a@linaro.org> Date: Fri, 2 Oct 2026 21:29:47 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: Neil Armstrong Subject: Re: [PATCH v2 1/2] arm64: dts: amlogic: meson-sm1-odroid-hc4: mux the SPI NOR HOLD# and WP# pins To: iav@iav.lv, Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Christian Hewitt , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org References: <20261002-hc4-spi-nor-v2-0-8366a4f91049@iav.lv> <20261002-hc4-spi-nor-v2-1-8366a4f91049@iav.lv> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20261002-hc4-spi-nor-v2-1-8366a4f91049@iav.lv> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/2/26 20:36, Igor Velkov via B4 Relay wrote: > From: Igor Velkov > > The SPI NOR flash uses six lines, but nor_pins covers only four: data, > clock and chip select. Nothing claims HOLD# (BOOT_3) and WP# (BOOT_7), > so they keep the boot ROM setting. After a boot from SPI they are in > the nor function and the flash works. After a boot from SD with the > button under the board, they stay eMMC data lines pulled low, and > spi-nor reports "unrecognized JEDEC id bytes: 00 00 00 00 00 00". > > Add them as a separate group in meson-g12-common.dtsi rather than to > nor_pins: whether HOLD# and WP# reach the SoC depends on the board. The > HC4 has eMMC disabled and takes both groups. > > Tested on ODROID-HC4: with BOOT_3 and BOOT_7 set back to eMMC with > pull-down and spifc rebound, the flash fails as above without this > patch and probes as a 16 MiB mtd0 with it. > > Fixes: 7178f340e929 ("arm64: dts: meson-sm1-odroid-hc4: add spifc node to ODROID-HC4") > Assisted-by: LLM > Signed-off-by: Igor Velkov > --- > arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 9 +++++++++ > arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts | 2 +- > 2 files changed, 10 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > index 00609d2da674..3135566df880 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > @@ -615,6 +615,15 @@ mux { > }; > }; > > + nor_hold_wp_pins: nor-hold-wp { > + mux { > + groups = "nor_hold", > + "nor_wp"; > + function = "nor"; > + bias-disable; > + }; > + }; > + > pdm_din0_a_pins: pdm-din0-a { > mux { > groups = "pdm_din0_a"; > diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts > index 3ece30a0a1ff..c4b93d6619f2 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts > @@ -126,7 +126,7 @@ &sd_emmc_c { > > &spifc { > status = "okay"; > - pinctrl-0 = <&nor_pins>; > + pinctrl-0 = <&nor_pins>, <&nor_hold_wp_pins>; > pinctrl-names = "default"; > > flash@0 { > Reviewed-by: Neil Armstrong Thanks, Neil