From: "Heiko Stübner" <heiko@sntech.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
Mike Turquette <mturquette@linaro.org>,
Hans de Goede <hdegoede@redhat.com>,
Emilio Lopez <emilio@elopez.com.ar>,
chris@printf.net, david.lanzendoerfer@o2s.ch,
ulf.hansson@linaro.org, devicetree@vger.kernel.org,
wens@csie.org, linux-mmc@vger.kernel.org
Subject: Re: [PATCH v3 01/12] clk: introduce clk_set_phase function & callback
Date: Wed, 24 Sep 2014 12:41:28 +0200 [thread overview]
Message-ID: <2358224.OpC02byeiR@phil> (raw)
In-Reply-To: <1410466706-27386-2-git-send-email-maxime.ripard@free-electrons.com>
Am Donnerstag, 11. September 2014, 22:18:15 schrieb Maxime Ripard:
> From: Mike Turquette <mturquette@linaro.org>
>
> A common operation for a clock signal generator is to shift the phase of
> that signal. This patch introduces a new function to the clk.h API to
> dynamically adjust the phase of a clock signal. Additionally this patch
> introduces support for the new function in the common clock framework
> via the .set_phase call back in struct clk_ops.
>
> Signed-off-by: Mike Turquette <mturquette@linaro.org>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This looks nice and would also be very useful for Rockchip SoCs I'm working
on. And the implementation looks very straightforward.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
> drivers/clk/clk.c | 85
> +++++++++++++++++++++++++++++++++++++++++--- include/linux/clk-private.h |
> 1 +
> include/linux/clk-provider.h | 5 +++
> include/linux/clk.h | 29 +++++++++++++++
> 4 files changed, 116 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index b76fa69b44cb..d87661af0c72 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -117,11 +117,11 @@ static void clk_summary_show_one(struct seq_file *s,
> struct clk *c, int level) if (!c)
> return;
>
> - seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu\n",
> + seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
> level * 3 + 1, "",
> 30 - level * 3, c->name,
> c->enable_count, c->prepare_count, clk_get_rate(c),
> - clk_get_accuracy(c));
> + clk_get_accuracy(c), clk_get_phase(c));
> }
>
> static void clk_summary_show_subtree(struct seq_file *s, struct clk *c,
> @@ -143,8 +143,8 @@ static int clk_summary_show(struct seq_file *s, void
> *data) struct clk *c;
> struct hlist_head **lists = (struct hlist_head **)s->private;
>
> - seq_puts(s, " clock enable_cnt prepare_cnt
> rate accuracy\n"); - seq_puts(s,
> "--------------------------------------------------------------------------
> ------\n"); + seq_puts(s, " clock enable_cnt
> prepare_cnt rate accuracy phase\n"); + seq_puts(s,
> "--------------------------------------------------------------------------
> --------------\n");
>
> clk_prepare_lock();
>
> @@ -180,6 +180,7 @@ static void clk_dump_one(struct seq_file *s, struct clk
> *c, int level) seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
> seq_printf(s, "\"rate\": %lu", clk_get_rate(c));
> seq_printf(s, "\"accuracy\": %lu", clk_get_accuracy(c));
> + seq_printf(s, "\"phase\": %d", clk_get_phase(c));
> }
>
> static void clk_dump_subtree(struct seq_file *s, struct clk *c, int level)
> @@ -264,6 +265,11 @@ static int clk_debug_create_one(struct clk *clk, struct
> dentry *pdentry) if (!d)
> goto err_out;
>
> + d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry,
> + (u32 *)&clk->phase);
> + if (!d)
> + goto err_out;
> +
> d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry,
> (u32 *)&clk->flags);
> if (!d)
> @@ -1739,6 +1745,77 @@ out:
> EXPORT_SYMBOL_GPL(clk_set_parent);
>
> /**
> + * clk_set_phase - adjust the phase shift of a clock signal
> + * @clk: clock signal source
> + * @degrees: number of degrees the signal is shifted
> + *
> + * Shifts the phase of a clock signal by the specified
> + * degrees. Returns 0 on success, -EERROR otherwise.
> + *
> + * This function makes no distinction about the input or reference
> + * signal that we adjust the clock signal phase against. For example
> + * phase locked-loop clock signal generators we may shift phase with
> + * respect to feedback clock signal input, but for other cases the
> + * clock phase may be shifted with respect to some other, unspecified
> + * signal.
> + *
> + * Additionally the concept of phase shift does not propagate through
> + * the clock tree hierarchy, which sets it apart from clock rates and
> + * clock accuracy. A parent clock phase attribute does not have an
> + * impact on the phase attribute of a child clock.
> + */
> +int clk_set_phase(struct clk *clk, int degrees)
> +{
> + int ret = 0;
> +
> + if (!clk)
> + goto out;
> +
> + /* sanity check degrees */
> + degrees %= 360;
> + if (degrees < 0)
> + degrees += 360;
> +
> + clk_prepare_lock();
> +
> + if (!clk->ops->set_phase)
> + goto out_unlock;
> +
> + ret = clk->ops->set_phase(clk->hw, degrees);
> +
> + if (!ret)
> + clk->phase = degrees;
> +
> +out_unlock:
> + clk_prepare_unlock();
> +
> +out:
> + return ret;
> +}
> +
> +/**
> + * clk_get_phase - return the phase shift of a clock signal
> + * @clk: clock signal source
> + *
> + * Returns the phase shift of a clock node in degrees, otherwise returns
> + * -EERROR.
> + */
> +int clk_get_phase(struct clk *clk)
> +{
> + int ret = 0;
> +
> + if (!clk)
> + goto out;
> +
> + clk_prepare_lock();
> + ret = clk->phase;
> + clk_prepare_unlock();
> +
> +out:
> + return ret;
> +}
> +
> +/**
> * __clk_init - initialize the data structures in a struct clk
> * @dev: device initializing this clk, placeholder for now
> * @clk: clk being initialized
> diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
> index efbf70b9fd84..845be30be50f 100644
> --- a/include/linux/clk-private.h
> +++ b/include/linux/clk-private.h
> @@ -46,6 +46,7 @@ struct clk {
> unsigned int enable_count;
> unsigned int prepare_count;
> unsigned long accuracy;
> + int phase;
> struct hlist_head children;
> struct hlist_node child_node;
> unsigned int notifier_count;
> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 411dd7eb2653..201a6195a3eb 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -129,6 +129,10 @@ struct dentry;
> * set then clock accuracy will be initialized to parent accuracy
> * or 0 (perfect clock) if clock has no parent.
> *
> + * @set_phase: Shift the phase this clock signal in degrees specified
> + * by the second argument. Valid values for degrees are
> + * 0-359. Return 0 on success, otherwise -EERROR.
> + *
> * @init: Perform platform-specific initialization magic.
> * This is not not used by any of the basic clock types.
> * Please consider other ways of solving initialization problems
> @@ -177,6 +181,7 @@ struct clk_ops {
> unsigned long parent_rate, u8 index);
> unsigned long (*recalc_accuracy)(struct clk_hw *hw,
> unsigned long parent_accuracy);
> + int (*set_phase)(struct clk_hw *hw, int degrees);
> void (*init)(struct clk_hw *hw);
> int (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
> };
> diff --git a/include/linux/clk.h b/include/linux/clk.h
> index fb5e097d8f72..38bdedd3e389 100644
> --- a/include/linux/clk.h
> +++ b/include/linux/clk.h
> @@ -106,6 +106,25 @@ int clk_notifier_unregister(struct clk *clk, struct
> notifier_block *nb); */
> long clk_get_accuracy(struct clk *clk);
>
> +/**
> + * clk_set_phase - adjust the phase shift of a clock signal
> + * @clk: clock signal source
> + * @degrees: number of degrees the signal is shifted
> + *
> + * Shifts the phase of a clock signal by the specified degrees. Returns 0
> on + * success, -EERROR otherwise.
> + */
> +int clk_set_phase(struct clk *clk, int degrees);
> +
> +/**
> + * clk_get_phase - return the phase shift of a clock signal
> + * @clk: clock signal source
> + *
> + * Returns the phase shift of a clock node in degrees, otherwise returns
> + * -EERROR.
> + */
> +int clk_get_phase(struct clk *clk);
> +
> #else
>
> static inline long clk_get_accuracy(struct clk *clk)
> @@ -113,6 +132,16 @@ static inline long clk_get_accuracy(struct clk *clk)
> return -ENOTSUPP;
> }
>
> +static inline long clk_set_phase(struct clk *clk, int phase)
> +{
> + return -ENOTSUPP;
> +}
> +
> +static inline long clk_get_phase(struct clk *clk)
> +{
> + return -ENOTSUPP;
> +}
> +
> #endif
>
> /**
next prev parent reply other threads:[~2014-09-24 10:41 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-11 20:18 [PATCH v3 00/12] clk: sunxi: Improve MMC clocks support Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 01/12] clk: introduce clk_set_phase function & callback Maxime Ripard
2014-09-24 10:41 ` Heiko Stübner [this message]
2014-09-11 20:18 ` [PATCH v3 02/12] clk: Include of.h in clock-provider.h Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 03/12] clk: Add a function to retrieve phase Maxime Ripard
2014-09-24 10:42 ` Heiko Stübner
2014-09-28 0:17 ` Mike Turquette
2014-09-29 8:24 ` Maxime Ripard
2014-09-30 7:01 ` Mike Turquette
2014-09-11 20:18 ` [PATCH v3 05/12] clk: sunxi: Introduce mbus compatible Maxime Ripard
[not found] ` <1410466706-27386-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-09-11 20:18 ` [PATCH v3 04/12] clk: sunxi: factors: Invert the probing logic Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 06/12] ARM: sunxi: dt: Switch to the new mbus compatible Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 09/12] ARM: sunxi: dt: Add sample and output mmc clocks Maxime Ripard
2014-09-12 10:23 ` Chen-Yu Tsai
2014-09-13 8:18 ` Maxime Ripard
2014-09-13 8:24 ` Chen-Yu Tsai
2014-09-11 20:18 ` [PATCH v3 07/12] clk: sunxi: Move mod0 clock to a file of its own Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 08/12] clk: sunxi: Move mbus to mod0 file Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 10/12] clk: sunxi: mod0: Introduce MMC proper phase handling Maxime Ripard
2014-09-11 20:18 ` [PATCH v3 11/12] mmc: sunxi: Convert MMC driver to the standard clock phase API Maxime Ripard
2014-09-26 14:27 ` David Lanzendörfer
[not found] ` <3992138.y6J8TjIuMq-pgFh0Jf6HD9Xzn/AsuzBOg@public.gmane.org>
2014-09-26 15:02 ` Maxime Ripard
2014-09-26 20:47 ` David Lanzendörfer
2014-09-11 20:18 ` [PATCH v3 12/12] clk: sunxi: Remove custom phase function Maxime Ripard
2014-09-12 7:22 ` [PATCH v3 00/12] clk: sunxi: Improve MMC clocks support Hans de Goede
2014-09-22 11:31 ` Maxime Ripard
2014-09-26 0:42 ` Mike Turquette
2014-09-26 6:55 ` Maxime Ripard
2014-09-26 17:52 ` Mike Turquette
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