From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACEBA28C2BB; Wed, 16 Jul 2025 07:40:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752651628; cv=none; b=qtG1AUOkNTAsMNkYu2aSpqcVkbp5fv3CaPcCCXgaatcsCvdSvnRH95Al56q9kPxkHvnuQxUIshgEpk7+NLY8y4H9PXRp0RunCV47TMwTjsXb+UrUGVx/P47gG9k0Rerbd0tFwPKtScEwd1pjCeRaIIpgPpJ6954UPOLpc18u32A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752651628; c=relaxed/simple; bh=MyFdsmOMJqbvkiVGXFhi5uxD9Pb8uK/+B0vVjEFLyJk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cVtRNfoLm+AizUZfdP4QTHPnCUWXxnMjnrJFU/tYpVHm0sBXfuMhRDpeaOH45GRdkOLpA1eGadbmYOqg3/MPWYaFcceNTk4RNl0IHNJhY1lnwvhiLUX5nAgZHxbWkjwYPVogme09O3i4cqM2Vav9OBWP92qDfFl9mkI30Mc1Q5Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=FTxmbPG1; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="FTxmbPG1" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To; bh=qgtjBGVAZ1tS5fJXKd4+bhI2PQYUrEH4Cz/qfvC/2po=; b=FTxmbPG1x9gKKjsM5WAh+rNIRC /+YNAwSYKFOaLt++uJ4akLU4L1U3GETfMY892VjCy5ZAPJnsrTOxzSQtdS2Npx5vrgDaI+q2gfISo FaSHyV2RSkf2RiUvTVOgEFrZKhcu6NXSPclXeHBTz793LdTFZqCMt3lVmXh8gVkH2Y9keELpbryPl CZ8aDjoPcXgtHDjDNDuGI7sPMsDiQz0cDk4gyULnFp1hcUNUtnyUDulCnWUUWYbmuzcqXsl2lz2z8 UFk5YsvH+HJU7Co075/zAc39Up67VtRcLRfZlG6I+JYhQdESBQ4dEJG0WcGPM0E4hvxo/GOw83Sqw pXOdRX6A==; Received: from i53875a74.versanet.de ([83.135.90.116] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ubwjz-0008Vz-1P; Wed, 16 Jul 2025 09:39:47 +0200 From: Heiko =?UTF-8?B?U3TDvGJuZXI=?= To: Dmitry Baryshkov , Chaoyi Chen , Chaoyi Chen Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Sandy Huang , Andy Yan , Yubing Zhang , Frank Wang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Amit Sunil Dhamne , Greg Kroah-Hartman , Dragan Simic , Johan Jonker , Diederik de Haas , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org Subject: Re: [PATCH 3/5] phy: rockchip: phy-rockchip-typec: Add support for Type-C TCPM Date: Wed, 16 Jul 2025 09:39:48 +0200 Message-ID: <23651445.EfDdHjke4D@diego> In-Reply-To: References: <20250715112456.101-1-kernel@airkyi.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Am Mittwoch, 16. Juli 2025, 03:56:27 Mitteleurop=C3=A4ische Sommerzeit schr= ieb Chaoyi Chen: > Hi Dmitry, >=20 > On 2025/7/15 20:05, Dmitry Baryshkov wrote: > > On Tue, Jul 15, 2025 at 07:24:54PM +0800, Chaoyi Chen wrote: > >> From: Chaoyi Chen > >> > >> This patch add support for Type-C Port Controller Manager. > >> The extcon device should still be supported. > >> > >> Signed-off-by: Chaoyi Chen > >> --- > >> drivers/phy/rockchip/phy-rockchip-typec.c | 335 ++++++++++++++++++++= =2D- > >> 1 file changed, 319 insertions(+), 16 deletions(-) > > Please keep TCPM implementation under drivers/usb/typec/tcpm/ . Create > > an aux device and write an aux driver for the TCPM part. >=20 > Sorry, the commit messages may not be described accurately enough. >=20 > This patch adds mux/switch operations to the PHY driver to improve=20 > communication with the TCPM framework. Since this PHY is a combo USB/DP=20 > PHY, it requires configuration changes to the PHY lanes based on the=20 > USB-C plug orientation (CC logic), similar to the existing extcon=20 > mechanism implementation. Of course, the original extcon functionality=20 > will remain fully compatible. and looking at other users of for example typec_switch_register() [0], there are a number of them already used in other phy drivers accross =46reescale, Qualcomm, Rockchip and Samsung. Grouping the mux/switch with the phy driver as this patch does, makes way more sense than to introduce additional infrastruture. [0] https://elixir.bootlin.com/linux/v6.15.6/A/ident/typec_switch_register