From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sherry Sun <sherry.sun@nxp.com>,
robh+dt@kernel.org, krzk+dt@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, manish.narani@xilinx.com,
michal.simek@xilinx.com, dinguyen@kernel.org, bp@suse.de
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-imx@nxp.com
Subject: Re: [PATCH V2 2/2] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
Date: Mon, 21 Mar 2022 09:09:24 +0100 [thread overview]
Message-ID: <23aef3f4-c205-88b6-73aa-5ecbd1446395@kernel.org> (raw)
In-Reply-To: <20220321075131.17811-3-sherry.sun@nxp.com>
On 21/03/2022 08:51, Sherry Sun wrote:
> i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
> for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
>
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 3f8703f3ba5b..f39da2b12ddc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -902,6 +902,12 @@
> interrupt-parent = <&gic>;
> };
>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-03-21 8:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-21 7:51 [PATCH V2 0/2] add ddr controller node to support EDAC on imx8mp Sherry Sun
2022-03-21 7:51 ` [PATCH V2 1/2] dt-bindings: memory: snps,ddrc-3.80a compatible also need interrupts Sherry Sun
2022-03-21 8:10 ` Krzysztof Kozlowski
2022-04-04 17:08 ` (subset) " Krzysztof Kozlowski
2022-03-21 7:51 ` [PATCH V2 2/2] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp Sherry Sun
2022-03-21 8:09 ` Krzysztof Kozlowski [this message]
2022-04-10 1:34 ` Shawn Guo
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