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Fri, 19 Dec 2025 09:52:16 +0100 (CET) From: Alexander Stein To: Geert Uytterhoeven Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Peter Chen , Pawel Laszczak , Roger Quadros , Greg Kroah-Hartman , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Magnus Damm , Marek Vasut , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-usb@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com Subject: Re: [PATCH 0/6] Support TQMa8QM Date: Fri, 19 Dec 2025 09:52:15 +0100 Message-ID: <24355727.EfDdHjke4D@steina-w> Organization: TQ-Systems GmbH In-Reply-To: References: <20251218152058.1521806-1-alexander.stein@ew.tq-group.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" X-cloud-security-sender:alexander.stein@ew.tq-group.com X-cloud-security-recipient:devicetree@vger.kernel.org X-cloud-security-crypt: load encryption module X-cloud-security-Mailarchiv: E-Mail archived for: alexander.stein@ew.tq-group.com X-cloud-security-Mailarchivtype:outbound X-cloud-security-Virusscan:CLEAN X-cloud-security-disclaimer: This E-Mail was scanned by E-Mailservice on mx-relay03-hz2.antispameurope.com with 4dXh9s3M9TzYd7D X-cloud-security-connect: he-nlb01-hz1.hornetsecurity.com[94.100.132.6], TLS=1, IP=94.100.132.6 X-cloud-security-Digest:d9ceb68c40de01de860771274803b5bf X-cloud-security:scantime:2.014 DKIM-Signature: a=rsa-sha256; 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Dezember 2025, 16:28:39 CET schrieb Geert Uytterhoeven: > Hi Alexander, >=20 > On Thu, 18 Dec 2025 at 16:22, Alexander Stein > wrote: > > this series adds support for TQ's TQMa8QM. The first 3 patches are prep= atory: > > 1. Add support for clock-output-names for clk-renesas-pcie. This is nec= essary > > as clk-imx8qxp-lpcg.c (driver for phyx1 phyx2 clock gating) reqiures th= at > > property on the parent clock. >=20 > Hmm, clock consumers should have no business with the names used by > clock providers, even less so whether those names are specified in DT > or not. Well drivers/clk/imx/clk-imx8qxp-lpcg.c does exactly this. AFAIK not just the ones references in DT, but also hard codes ones. The root cause is that clock-hsio-refa and clock-hsio-refb in arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi are setting platform-specif= ic GPIOs in SoC .dtsi... My current idea is to use fixed-factor-clock instead: > &hsio_refa_clk { > compatible =3D "fixed-factor-clock"; > clocks =3D <&pcieclk 0>; > clock-div =3D <1>; > clock-mult =3D <1>; > /delete-property/ enable-gpios; > }; >=20 > &hsio_refb_clk { > compatible =3D "fixed-factor-clock"; > clocks =3D <&pcieclk 0>; > clock-div =3D <1>; > clock-mult =3D <1>; > /delete-property/ enable-gpios; > }; Best regards, Alexander =2D-=20 TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/