From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3FD9D271; Tue, 25 Nov 2025 11:00:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764068446; cv=none; b=g11tc/5PtuEYfP790G1ym7Im+IhKza2/rkfJmtPWFiLI9U4xI5nvA7mAwfv+9X7ygobm9/wa1rFSLR/STUrTAXZ6yn2o/Tue9J1rvtoKMQq60OwqxQbkDoqlBHWUNMs6Pgm/l3SD/k9gmonlQ7LF+CXyCEaGraVc+ZM7ua8oX6c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764068446; c=relaxed/simple; bh=QiOgoJoXqDk9M6kPeTKYdXRgOzf255a/k246EvsS2gQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ulMV1v2aKLTbznYQaAm+mQAHwwN22wi3oIWGl0MPJHMCCm1Oio/mo4XpLho2tN/sSB3ZIRBOB1zu8O7V70OGEAlvwLZhqYUnve+3z5ZSIXpGCl+hhjZLk4QfM2js/p1/UqOG0cTwbTw8RNAtPX7g68hHgcA1EEFzpFCucpwaLA0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Yb8IaVk8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Yb8IaVk8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7036CC4CEF1; Tue, 25 Nov 2025 11:00:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1764068445; bh=QiOgoJoXqDk9M6kPeTKYdXRgOzf255a/k246EvsS2gQ=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Yb8IaVk8lxZFuHa84VJqUArkGxDdR1eb6k/enxf2TEAf46rpXl/9aoySTcS0gYEHI NXmUrLr/haloP6mbpuZJRRz9kPzaQzfoCe9COK7CAG2TEVRE2bjd1vDnmANEK2aYWP z0qBsks04D/X/DW8rq+UhwUhXLDePpUar1sRQsqbkkZvmTIJp6fEgy8qDtYM+D8gfj BGFQDR1pAl9J91CsWuOA2AAzZZK9aF3liUM4XPSWWixCuNxNYkItV9ARC0O1AdIgLx XFuyIjfA7WO9kf3NBNuJPwc1EoYSAZpvvsIzm6Fq3dP8ykasNKiUDAraOr2jFb1zHj T82gAXSDVItFQ== Message-ID: <25ee55eb-91d6-4da2-a798-b704acfae4fe@kernel.org> Date: Tue, 25 Nov 2025 12:00:41 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] dt-bindings: firmware: coreboot: Convert to YAML To: Chen-Yu Tsai Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, chrome-platform@lists.linux.dev, Julius Werner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20251125064851.3781993-1-wenst@chromium.org> <20251125-outgoing-boisterous-millipede-6dabaf@kuoka> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 25/11/2025 11:41, Chen-Yu Tsai wrote: >>> diff --git a/Documentation/devicetree/bindings/firmware/coreboot.yaml b/Documentation/devicetree/bindings/firmware/coreboot.yaml >>> new file mode 100644 >>> index 000000000000..568afd1abb92 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/firmware/coreboot.yaml >>> @@ -0,0 +1,60 @@ >>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/firmware/coreboot.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: COREBOOT firmware information >> >> Coreboot > > OK. Side note, coreboot is stylized in all lowercase letters. > Should I follow that or just use standard English rules? Just choose one. Here was capitals, but in description not. Preferably Coreboot or coreboot > >>> + >>> +maintainers: >>> + - Julius Werner >>> + >>> +description: >>> + The device tree node to communicate the location of coreboot's >>> + memory-resident bookkeeping structures to the kernel. Coreboot's >>> + FIT image payload can insert the node into the device tree. If a >>> + second-stage bootloader (a coreboot "payload") is used, then it >>> + is responsible for inserting the node. >>> + >>> +properties: >>> + compatible: >>> + const: coreboot >> >> Blank line (it is always here, there is no example without, which makes >> me wonder which file you took as starting point) > > I actually converted the existing text file directly, copying > boilerplate, i.e. the top few lines, from another file. > >>> + reg: >>> + description: Address and length of the following two memory regions >> >> Drop description, redundant. > > Ack. > >>> + items: >>> + - description: >>> + The coreboot table. This is a list of variable-sized descriptors >>> + that contain various compile- and run-time generated firmware >>> + parameters. It is identified by the magic string "LBIO" in its first >>> + four bytes. >>> + >>> + See coreboot's src/commonlib/include/commonlib/coreboot_tables.h for >>> + details. >>> + - description: >>> + The CBMEM area. This is a downward-growing memory region used by >>> + coreboot to dynamically allocate data structures that remain resident. >>> + It may or may not include the coreboot table as one of its members. It >>> + is identified by a root node descriptor with the magic number >>> + 0xc0389481 that resides in the topmost 8 bytes of the area. >>> + >>> + See coreboot's src/include/imd.h for details. >>> + >>> +required: >>> + - compatible >>> + - reg >>> + >>> +additionalProperties: false >>> + >>> +examples: >>> + - | >>> + firmware { >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + ranges; >>> + >>> + /* Firmware actually emits "coreboot" node without unit name */ >>> + coreboot@fdfea000 { >>> + compatible = "coreboot"; >>> + reg = <0xfdfea000 0x264>, <0xfdfea000 0x16000>; >> >> That's the same address in both places, so the same one entry. You need >> two distinctive addresses or binding needs changes to have only one item >> as well. > > The description does mention that the latter block can include the > former. It's really up to the firmware. If you like I can include > two examples to cover both cases. Lovely, I don't think we should accept growing this binding at all until coreboot fixes this mess (duplicated entry and missing unit address). Best regards, Krzysztof