From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A00F927603C; Thu, 8 Jan 2026 16:43:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767890623; cv=none; b=pvOp+u3F5yNAZZYlHyPQxndzOurKWYiSoGqYfT5s9+7LBChoqse0JlWMrl4tmqamI2qiey9681CSf+APZDnquN3j7jY/g0YuSSfyDBzBdloNFtR3cC+WTqe7KbW9fkN/ohA3pGpa9YJo6iGplhjygTKxYEjErdsPElICef1Z73M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767890623; c=relaxed/simple; bh=BV2Gu6VvqDnjUG9CdfeoHNPKb8cbX0GclRstD7UwMGY=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=BWH1FhcCbyBZ6uQvndfBz6pgQI4daRcAfGvpJIcpuyJpbgObVbmcgtMRraHfbNQO8gMBOSXFqgpf5IHCcuzO4EViWBtj8ssAYQuUFv9nnfPEVrE7dk3ZrMfTMSV/3rqz355ROH49PK4DV3ZvE1kn2ncGpE/zrNQCbT2vSAK/gC0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Nk2f8YRy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Nk2f8YRy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 19B71C116C6; Thu, 8 Jan 2026 16:43:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767890623; bh=BV2Gu6VvqDnjUG9CdfeoHNPKb8cbX0GclRstD7UwMGY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Nk2f8YRygJ+5gB3s5fKTjtytG/ystrFTw0/9KQJD85FxII3hTLdI4Mj1I4GaPUU5z b/Z9A1Ez9BY6BbP2yn2eLg5hDIiTk2KLKH1e5DIIQipCOrTyq+UprVH6bl4OT5WfcN AcExX1cCFp8kbdm4JPTvtGYaevEx8lFsPsQiEzZD1nj7avkdlxzZzeljgNtuvTFbap X7i9ESH71JTVu7Bf9IF8F5MmUYqlcBG26sRjvft2sQD7gifq3Hl1IVsTItyHePm2sA mCLeT7saStjxtYhqU1Q6Aw7YjIJMEdVyPrOqG+cgwTrGHKoCpkjZQ2WTOrlQ5qqfIE U8jgBIyJQeUyA== Message-ID: <260f91bf-c285-4a2f-b4dc-457e7b601761@kernel.org> Date: Thu, 8 Jan 2026 17:43:38 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] arm64: dts: lg: Initial support for LG1215 SoC and reference board To: Chanho Min , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Neil Armstrong , Kever Yang , Kael D'Alcamo , Manivannan Sadhasivam , Lad Prabhakar Cc: Gunho Lee , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20260108082213.6545-1-chanho.min@lge.com> <20260108082213.6545-4-chanho.min@lge.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 08/01/2026 09:22, Chanho Min wrote: > + compatible = "arm,psci"; > + method = "smc"; > + cpu_suspend = <0xc4000001>; > + cpu_off = <0xc4000002>; > + cpu_on = <0xc4000003>; > + }; > + > + cpu0_opp_table: opp_table@0 { More warnings... 1. Please follow coding style 2. Please use generic or approved names for this. > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp-default { > + opp-hz = /bits/ 64 <1600000000>; > + }; > + }; > + > + gic: interrupt-controller@c0000000 { Wrongly placed. All MMIO nodes are part of soc. > + compatible = "arm,gic-400"; > + reg = <0x0 0xc0001000 0x0 0x1000>, /* GICD */ > + <0x0 0xc0002000 0x0 0x2000>, /* GICC */ > + <0x0 0xc0004000 0x0 0x2000>, /* GICH */ > + <0x0 0xc0006000 0x0 0x2000>; /* GICV */ > + #interrupt-cells = <3>; > + #address-cells = <0>; > + interrupts = + IRQ_TYPE_LEVEL_LOW)>; > + > + interrupt-controller; > + }; > + > + pmu { > + compatible = "arm,armv8-pmuv3"; > + interrupts = , > + , > + , > + ; > + interrupt-affinity = <&cpu0>, > + <&cpu1>, > + <&cpu2>, > + <&cpu3>; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = + IRQ_TYPE_LEVEL_LOW)>, > + + IRQ_TYPE_LEVEL_LOW)>, > + + IRQ_TYPE_LEVEL_LOW)>, > + + IRQ_TYPE_LEVEL_LOW)>; > + }; > + > + clks { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; No, this makes no sense, that's not a bus or any sort of device. Drop entire node. > + > + clk_xtal: clk-xtal { > + compatible = "fixed-clock"; > + clock-output-names = "xtal"; > + clock-frequency = <50000000>; > + > + #clock-cells = <0>; > + }; > + > + clk_bus: clk-bus { > + compatible = "fixed-factor-clock"; > + clocks = <&clk_xtal>; > + clock-names = "xtal"; > + clock-output-names = "busclk"; > + clock-div = <1>; > + clock-mult = <4>; > + > + #clock-cells = <0>; > + }; > + }; > + > + soc { > + compatible = "simple-bus"; > + > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + interrupt-parent = <&gic>; > + > + dwmac_axi_config: dwmac-axi-config { I don't think this validates. Also, you really should follow DTS coding style. > + snps,rd_osr_lmt = <0x07>; > + snps,wr_osr_lmt = <0x07>; > + snps,blen = <0 0 16 0 0 0 0>; > + }; Best regards, Krzysztof