From: Neil Armstrong <neil.armstrong@linaro.org>
To: Xianwei Zhao <xianwei.zhao@amlogic.com>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 2/2] dts: arm64: amlogic: add a5 pinctrl node
Date: Tue, 21 Oct 2025 14:23:54 +0200 [thread overview]
Message-ID: <263b86c9-61da-4d5e-af3d-4b9105112d82@linaro.org> (raw)
In-Reply-To: <6ebddeb4-b33f-4392-b5da-56501b38fd6d@amlogic.com>
Hi,
On 9/5/25 05:19, Xianwei Zhao wrote:
> Hi Neil,
> Could you please take some time to review this submission?
Could you rebase on v6.18-rc1 ?
Thanks,
Neil
>
> On 2025/4/3 16:33, Xianwei Zhao via B4 Relay wrote:
>> [ EXTERNAL EMAIL ]
>>
>> From: Xianwei Zhao <xianwei.zhao@amlogic.com>
>>
>> Add pinctrl device to support Amlogic A5.
>>
>> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
>> ---
>> arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 90 +++++++++++++++++++++++++++++
>> 1 file changed, 90 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>> index 32ed1776891b..844302db2133 100644
>> --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
>> @@ -4,6 +4,7 @@
>> */
>>
>> #include "amlogic-a4-common.dtsi"
>> +#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
>> #include <dt-bindings/power/amlogic,a5-pwrc.h>
>> / {
>> cpus {
>> @@ -50,6 +51,95 @@ pwrc: power-controller {
>> };
>>
>> &apb {
>> + periphs_pinctrl: pinctrl@4000 {
>> + compatible = "amlogic,pinctrl-a5",
>> + "amlogic,pinctrl-a4";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges = <0x0 0x0 0x0 0x4000 0x0 0x300>;
>> +
>> + gpioz: gpio@c0 {
>> + reg = <0x0 0xc0 0x0 0x40>,
>> + <0x0 0x18 0x0 0x8>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>;
>> + };
>> +
>> + gpiox: gpio@100 {
>> + reg = <0x0 0x100 0x0 0x40>,
>> + <0x0 0xc 0x0 0xc>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>;
>> + };
>> +
>> + gpiot: gpio@140 {
>> + reg = <0x0 0x140 0x0 0x40>,
>> + <0x0 0x2c 0x0 0x8>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_T<<8) 14>;
>> + };
>> +
>> + gpiod: gpio@180 {
>> + reg = <0x0 0x180 0x0 0x40>,
>> + <0x0 0x40 0x0 0x8>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 16>;
>> + };
>> +
>> + gpioe: gpio@1c0 {
>> + reg = <0x0 0x1c0 0x0 0x40>,
>> + <0x0 0x48 0x0 0x4>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>;
>> + };
>> +
>> + gpioc: gpio@200 {
>> + reg = <0x0 0x200 0x0 0x40>,
>> + <0x0 0x24 0x0 0x8>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 11>;
>> + };
>> +
>> + gpiob: gpio@240 {
>> + reg = <0x0 0x240 0x0 0x40>,
>> + <0x0 0x0 0x0 0x8>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>;
>> + };
>> +
>> + gpioh: gpio@280 {
>> + reg = <0x0 0x280 0x0 0x40>,
>> + <0x0 0x4c 0x0 0x4>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 5>;
>> + };
>> +
>> + gpio_test_n: gpio@2c0 {
>> + reg = <0x0 0x2c0 0x0 0x40>,
>> + <0x0 0x3c 0x0 0x4>;
>> + reg-names = "gpio", "mux";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>;
>> + };
>> + };
>> +
>> gpio_intc: interrupt-controller@4080 {
>> compatible = "amlogic,a5-gpio-intc",
>> "amlogic,meson-gpio-intc";
>>
>> --
>> 2.37.1
>>
>>
next prev parent reply other threads:[~2025-10-21 12:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-03 8:33 [PATCH v3 0/2] Pinctrl: add amlogic a5 pinctrl node Xianwei Zhao via B4 Relay
2025-04-03 8:33 ` [PATCH v3 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for A5 Xianwei Zhao via B4 Relay
2025-04-15 7:40 ` Linus Walleij
2025-04-03 8:33 ` [PATCH v3 2/2] dts: arm64: amlogic: add a5 pinctrl node Xianwei Zhao via B4 Relay
2025-07-07 2:48 ` Xianwei Zhao
2025-07-22 11:43 ` Xianwei Zhao
2025-09-05 3:19 ` Xianwei Zhao
2025-10-21 12:23 ` Neil Armstrong [this message]
2025-10-22 2:09 ` Xianwei Zhao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=263b86c9-61da-4d5e-af3d-4b9105112d82@linaro.org \
--to=neil.armstrong@linaro.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jbrunet@baylibre.com \
--cc=khilman@baylibre.com \
--cc=krzk+dt@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=martin.blumenstingl@googlemail.com \
--cc=robh@kernel.org \
--cc=xianwei.zhao@amlogic.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).