From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Subject: [PATCH 1/2] pinctrl: sh-pfc: add PORT_GP_CFG_25() helper macro From: Sergei Shtylyov References: Message-ID: <26e823ef-759f-16e7-f3da-ac6ce7c01ad3@cogentembedded.com> Date: Sun, 25 Feb 2018 21:13:02 +0300 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-MW Content-Transfer-Encoding: 7bit To: Linus Walleij , Rob Herring , Geert Uytterhoeven , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Mark Rutland , Laurent Pinchart List-ID: They follow the style of the existing PORT_GP_CFG_() macros and will be used by a follow-up patch for the R8A77980 SoC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov --- drivers/pinctrl/sh-pfc/sh_pfc.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) Index: renesas/drivers/pinctrl/sh-pfc/sh_pfc.h =================================================================== --- renesas.orig/drivers/pinctrl/sh-pfc/sh_pfc.h +++ renesas/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -470,9 +470,13 @@ extern const struct sh_pfc_soc_info shx3 PORT_GP_CFG_1(bank, 23, fn, sfx, cfg) #define PORT_GP_24(bank, fn, sfx) PORT_GP_CFG_24(bank, fn, sfx, 0) -#define PORT_GP_CFG_26(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_25(bank, fn, sfx, cfg) \ PORT_GP_CFG_24(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 24, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 24, fn, sfx, cfg) +#define PORT_GP_25(bank, fn, sfx) PORT_GP_CFG_25(bank, fn, sfx, 0) + +#define PORT_GP_CFG_26(bank, fn, sfx, cfg) \ + PORT_GP_CFG_25(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 25, fn, sfx, cfg) #define PORT_GP_26(bank, fn, sfx) PORT_GP_CFG_26(bank, fn, sfx, 0)