[PATCH v3 0/6] Add R8A7794/SILK sound DT support

[PATCH v3 0/6] Add R8A7794/SILK sound DT support

[Sergei Shtylyov]

Hello.

   Here's the set of 6 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160509-v4.6-rc7' tag. I'm adding the sound device tree support
for the R8A7794 SoC based SILK board.

[1/6] ARM: dts: r8a7794: add audio clocks
[2/6] ARM: dts: r8a7794: add MSTP5 clocks
[3/6] ARM: dts: r8a7794: add MSTP10 clocks
[4/6] ARM: dts: r8a7794: add Audio-DMAC support
[5/6] ARM: dts: r8a7794: add sound support
[6/6] ARM: dts: silk: add sound support

WBR, Sergei

[PATCH v3 1/6] ARM: dts: r8a7794: add audio clocks

[Sergei Shtylyov]

Describe  the external audio clocks (signals AUDIO_CLK[ABC]) required by
the sound driver.  Boards that provide audio clocks need to  override the
clock frequencies.

This patch is based on the commit 0d3dbde84a45 ("ARM: shmobile: r8a7791:
add  audio clock on DTSI").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 3:
- removed now redundant "clock-output-names" properties;
- reformatted the changelog;
- refreshed the patch.

 arch/arm/boot/dts/r8a7794.dtsi |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -920,6 +920,27 @@
 			clock-frequency = <0>;
 		};
 
+		/*
+		 * The external audio clocks are configured  as 0 Hz fixed
+		 * frequency clocks by default.  Boards that provide audio
+		 * clocks should override them.
+		 */
+		audio_clka: audio_clka {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+		};
+		audio_clkb: audio_clkb {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+		};
+		audio_clkc: audio_clkc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+		};
+
 		/* Special CPG clocks */
 		cpg_clocks: cpg_clocks@e6150000 {
 			compatible = "renesas,r8a7794-cpg-clocks",

[PATCH v3 2/6] ARM: dts: r8a7794: add MSTP5 clocks

[Sergei Shtylyov]

Add some MSTP5 clocks to the R8A7794 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 3:
- refreshed the patch.

Changes in version 2:
- added "the" article to the change log.

 arch/arm/boot/dts/r8a7794.dtsi            |    9 +++++++++
 include/dt-bindings/clock/r8a7794-clock.h |    1 +
 2 files changed, 10 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -1172,6 +1172,15 @@
 			clock-indices = <R8A7794_CLK_IRQC>;
 			clock-output-names = "irqc";
 		};
+		mstp5_clks: mstp5_clks@e6150144 {
+			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
+			clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
+			#clock-cells = <1>;
+			clock-indices = <R8A7794_CLK_AUDIO_DMAC0
+					 R8A7794_CLK_THERMAL R8A7794_CLK_PWM>;
+			clock-output-names = "audmac0", "thermal", "pwm";
+		};
 		mstp7_clks: mstp7_clks@e615014c {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
===================================================================
--- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
+++ renesas/include/dt-bindings/clock/r8a7794-clock.h
@@ -67,6 +67,7 @@
 #define R8A7794_CLK_IRQC		7
 
 /* MSTP5 */
+#define R8A7794_CLK_AUDIO_DMAC0		2
 #define R8A7794_CLK_THERMAL		22
 #define R8A7794_CLK_PWM			23
 

Re: [PATCH v3 2/6] ARM: dts: r8a7794: add MSTP5 clocks

[Geert Uytterhoeven]

Hi Sergei,

On Thu, May 12, 2016 at 10:45 PM, Sergei Shtylyov
<sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org> wrote:
> Add some MSTP5 clocks to the R8A7794 device tree.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
>
> ---
> Changes in version 3:
> - refreshed the patch.
>
> Changes in version 2:
> - added "the" article to the change log.
>
>  arch/arm/boot/dts/r8a7794.dtsi            |    9 +++++++++
>  include/dt-bindings/clock/r8a7794-clock.h |    1 +
>  2 files changed, 10 insertions(+)
>
> Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1172,6 +1172,15 @@
>                         clock-indices = <R8A7794_CLK_IRQC>;
>                         clock-output-names = "irqc";
>                 };
> +               mstp5_clks: mstp5_clks@e6150144 {
> +                       compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
> +                       reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
> +                       clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
> +                       #clock-cells = <1>;
> +                       clock-indices = <R8A7794_CLK_AUDIO_DMAC0
> +                                        R8A7794_CLK_THERMAL R8A7794_CLK_PWM>;
> +                       clock-output-names = "audmac0", "thermal", "pwm";

R-Car E2 does not have the thermal module.

> +               };
>                 mstp7_clks: mstp7_clks@e615014c {
>                         compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
>                         reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
> Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
> ===================================================================
> --- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
> +++ renesas/include/dt-bindings/clock/r8a7794-clock.h
> @@ -67,6 +67,7 @@
>  #define R8A7794_CLK_IRQC               7
>
>  /* MSTP5 */
> +#define R8A7794_CLK_AUDIO_DMAC0                2
>  #define R8A7794_CLK_THERMAL            22

Hence R8A7794_CLK_THERMAL should be removed.

>  #define R8A7794_CLK_PWM                        23

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Re: [PATCH v3 2/6] ARM: dts: r8a7794: add MSTP5 clocks

[Sergei Shtylyov]

On 05/19/2016 07:25 PM, Geert Uytterhoeven wrote:

>> Add some MSTP5 clocks to the R8A7794 device tree.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
>> ---
>> Changes in version 3:
>> - refreshed the patch.
>>
>> Changes in version 2:
>> - added "the" article to the change log.
>>
>>  arch/arm/boot/dts/r8a7794.dtsi            |    9 +++++++++
>>  include/dt-bindings/clock/r8a7794-clock.h |    1 +
>>  2 files changed, 10 insertions(+)
>>
>> Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
>> ===================================================================
>> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
>> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
>> @@ -1172,6 +1172,15 @@
>>                         clock-indices = <R8A7794_CLK_IRQC>;
>>                         clock-output-names = "irqc";
>>                 };
>> +               mstp5_clks: mstp5_clks@e6150144 {
>> +                       compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
>> +                       reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
>> +                       clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
>> +                       #clock-cells = <1>;
>> +                       clock-indices = <R8A7794_CLK_AUDIO_DMAC0
>> +                                        R8A7794_CLK_THERMAL R8A7794_CLK_PWM>;
>> +                       clock-output-names = "audmac0", "thermal", "pwm";
>
> R-Car E2 does not have the thermal module.

    My "R-Car Series, 2nd Generation User’s Manual: Hardware, Rev.1.02 Oct 
2014" says it does. What's your source?

>> +               };
>>                 mstp7_clks: mstp7_clks@e615014c {
>>                         compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
>>                         reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
>> Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
>> ===================================================================
>> --- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
>> +++ renesas/include/dt-bindings/clock/r8a7794-clock.h
>> @@ -67,6 +67,7 @@
>>  #define R8A7794_CLK_IRQC               7
>>
>>  /* MSTP5 */
>> +#define R8A7794_CLK_AUDIO_DMAC0                2
>>  #define R8A7794_CLK_THERMAL            22
>
> Hence R8A7794_CLK_THERMAL should be removed.

    Well, remove it then. ;-)

>>  #define R8A7794_CLK_PWM                        23
>
> Gr{oetje,eeting}s,

MBR, Sergei

Re: [PATCH v3 2/6] ARM: dts: r8a7794: add MSTP5 clocks

[Simon Horman]

On Thu, May 19, 2016 at 08:30:12PM +0300, Sergei Shtylyov wrote:
> On 05/19/2016 07:25 PM, Geert Uytterhoeven wrote:
> 
> >>Add some MSTP5 clocks to the R8A7794 device tree.
> >>
> >>Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>
> >>---
> >>Changes in version 3:
> >>- refreshed the patch.
> >>
> >>Changes in version 2:
> >>- added "the" article to the change log.
> >>
> >> arch/arm/boot/dts/r8a7794.dtsi            |    9 +++++++++
> >> include/dt-bindings/clock/r8a7794-clock.h |    1 +
> >> 2 files changed, 10 insertions(+)
> >>
> >>Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
> >>===================================================================
> >>--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> >>+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> >>@@ -1172,6 +1172,15 @@
> >>                        clock-indices = <R8A7794_CLK_IRQC>;
> >>                        clock-output-names = "irqc";
> >>                };
> >>+               mstp5_clks: mstp5_clks@e6150144 {
> >>+                       compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
> >>+                       reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
> >>+                       clocks = <&hp_clk>, <&extal_clk>, <&p_clk>;
> >>+                       #clock-cells = <1>;
> >>+                       clock-indices = <R8A7794_CLK_AUDIO_DMAC0
> >>+                                        R8A7794_CLK_THERMAL R8A7794_CLK_PWM>;
> >>+                       clock-output-names = "audmac0", "thermal", "pwm";
> >
> >R-Car E2 does not have the thermal module.
> 
>    My "R-Car Series, 2nd Generation User’s Manual: Hardware, Rev.1.02 Oct
> 2014" says it does. What's your source?

Please see chapter 80 of v2.00.
I have also confirmed with the hw team that the thermal sensor is not present.

FWIW until recently I was also going off the older documentation in this
regards and the absence of the thermal block was a bit of a revelation to
me.

> >>+               };
> >>                mstp7_clks: mstp7_clks@e615014c {
> >>                        compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
> >>                        reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
> >>Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
> >>===================================================================
> >>--- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
> >>+++ renesas/include/dt-bindings/clock/r8a7794-clock.h
> >>@@ -67,6 +67,7 @@
> >> #define R8A7794_CLK_IRQC               7
> >>
> >> /* MSTP5 */
> >>+#define R8A7794_CLK_AUDIO_DMAC0                2
> >> #define R8A7794_CLK_THERMAL            22
> >
> >Hence R8A7794_CLK_THERMAL should be removed.
> 
>    Well, remove it then. ;-)
> 
> >> #define R8A7794_CLK_PWM                        23
> >
> >Gr{oetje,eeting}s,
> 
> MBR, Sergei
> 

[PATCH v3 3/6] ARM: dts: r8a7794: add MSTP10 clocks

[Sergei Shtylyov]

Add MSTP10 clocks to the R8A7794 device tree.

This patch is based on the commit ee9141522dcf ("ARM: shmobile: r8a7791:
add MSTP10 support on DTSI").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 3:
- refreshed the patch.

Changes in version 2:
- fixed the SoC model in the change log;
- added "the" article to the change log.

 arch/arm/boot/dts/r8a7794.dtsi            |   53 ++++++++++++++++++++++++++++++
 include/dt-bindings/clock/r8a7794-clock.h |   28 +++++++++++++++
 2 files changed, 81 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -1235,6 +1235,59 @@
 				"gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod",
 				"i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
 		};
+		mstp10_clks: mstp10_clks@e6150998 {
+			compatible = "renesas,r8a7794-mstp-clocks",
+				     "renesas,cpg-mstp-clocks";
+			reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+			clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+				 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>,
+				 <&mstp10_clks R8A7794_CLK_SCU_ALL>;
+			#clock-cells = <1>;
+			clock-indices = <R8A7794_CLK_SSI_ALL
+					 R8A7794_CLK_SSI9 R8A7794_CLK_SSI8
+					 R8A7794_CLK_SSI7 R8A7794_CLK_SSI6
+					 R8A7794_CLK_SSI5 R8A7794_CLK_SSI4
+					 R8A7794_CLK_SSI3 R8A7794_CLK_SSI2
+					 R8A7794_CLK_SSI1 R8A7794_CLK_SSI0
+					 R8A7794_CLK_SCU_ALL
+					 R8A7794_CLK_SCU_DVC1
+					 R8A7794_CLK_SCU_DVC0
+					 R8A7794_CLK_SCU_CTU1_MIX1
+					 R8A7794_CLK_SCU_CTU0_MIX0
+					 R8A7794_CLK_SCU_SRC9
+					 R8A7794_CLK_SCU_SRC8
+					 R8A7794_CLK_SCU_SRC7
+					 R8A7794_CLK_SCU_SRC6
+					 R8A7794_CLK_SCU_SRC5
+					 R8A7794_CLK_SCU_SRC4
+					 R8A7794_CLK_SCU_SRC3
+					 R8A7794_CLK_SCU_SRC2
+					 R8A7794_CLK_SCU_SRC1
+					 R8A7794_CLK_SCU_SRC0>;
+			clock-output-names = "ssi-all", "ssi9", "ssi8", "ssi7",
+					     "ssi6", "ssi5", "ssi4", "ssi3",
+					     "ssi2", "ssi1", "ssi0",
+					     "scu-all", "scu-dvc1", "scu-dvc0",
+					     "scu-ctu1-mix1", "scu-ctu0-mix0",
+					     "scu-src9", "scu-src8", "scu-src7",
+					     "scu-src6", "scu-src5", "scu-src4",
+					     "scu-src3", "scu-src2", "scu-src1",
+					     "scu-src0";
+		};
 		mstp11_clks: mstp11_clks@e615099c {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
===================================================================
--- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
+++ renesas/include/dt-bindings/clock/r8a7794-clock.h
@@ -109,6 +109,34 @@
 #define R8A7794_CLK_I2C1		30
 #define R8A7794_CLK_I2C0		31
 
+/* MSTP10 */
+#define R8A7794_CLK_SSI_ALL		5
+#define R8A7794_CLK_SSI9		6
+#define R8A7794_CLK_SSI8		7
+#define R8A7794_CLK_SSI7		8
+#define R8A7794_CLK_SSI6		9
+#define R8A7794_CLK_SSI5		10
+#define R8A7794_CLK_SSI4		11
+#define R8A7794_CLK_SSI3		12
+#define R8A7794_CLK_SSI2		13
+#define R8A7794_CLK_SSI1		14
+#define R8A7794_CLK_SSI0		15
+#define R8A7794_CLK_SCU_ALL		17
+#define R8A7794_CLK_SCU_DVC1		18
+#define R8A7794_CLK_SCU_DVC0		19
+#define R8A7794_CLK_SCU_CTU1_MIX1	20
+#define R8A7794_CLK_SCU_CTU0_MIX0	21
+#define R8A7794_CLK_SCU_SRC9		22
+#define R8A7794_CLK_SCU_SRC8		23
+#define R8A7794_CLK_SCU_SRC7		24
+#define R8A7794_CLK_SCU_SRC6		25
+#define R8A7794_CLK_SCU_SRC5		26
+#define R8A7794_CLK_SCU_SRC4		27
+#define R8A7794_CLK_SCU_SRC3		28
+#define R8A7794_CLK_SCU_SRC2		29
+#define R8A7794_CLK_SCU_SRC1		30
+#define R8A7794_CLK_SCU_SRC0		31
+
 /* MSTP11 */
 #define R8A7794_CLK_SCIFA3		6
 #define R8A7794_CLK_SCIFA4		7

Re: [PATCH v3 3/6] ARM: dts: r8a7794: add MSTP10 clocks

[Geert Uytterhoeven]

On Thu, May 12, 2016 at 10:46 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add MSTP10 clocks to the R8A7794 device tree.
>
> This patch is based on the commit ee9141522dcf ("ARM: shmobile: r8a7791:
> add MSTP10 support on DTSI").
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
> Changes in version 3:
> - refreshed the patch.
>
> Changes in version 2:
> - fixed the SoC model in the change log;
> - added "the" article to the change log.
>
>  arch/arm/boot/dts/r8a7794.dtsi            |   53 ++++++++++++++++++++++++++++++
>  include/dt-bindings/clock/r8a7794-clock.h |   28 +++++++++++++++
>  2 files changed, 81 insertions(+)
>
> Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1235,6 +1235,59 @@
>                                 "gpio1", "gpio0", "rcan1", "rcan0", "qspi_mod",
>                                 "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0";
>                 };
> +               mstp10_clks: mstp10_clks@e6150998 {
> +                       compatible = "renesas,r8a7794-mstp-clocks",
> +                                    "renesas,cpg-mstp-clocks";
> +                       reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
> +                       clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
> +                                <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
> +                                <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>,
> +                                <&mstp10_clks R8A7794_CLK_SCU_ALL>;
> +                       #clock-cells = <1>;
> +                       clock-indices = <R8A7794_CLK_SSI_ALL
> +                                        R8A7794_CLK_SSI9 R8A7794_CLK_SSI8
> +                                        R8A7794_CLK_SSI7 R8A7794_CLK_SSI6
> +                                        R8A7794_CLK_SSI5 R8A7794_CLK_SSI4
> +                                        R8A7794_CLK_SSI3 R8A7794_CLK_SSI2
> +                                        R8A7794_CLK_SSI1 R8A7794_CLK_SSI0
> +                                        R8A7794_CLK_SCU_ALL
> +                                        R8A7794_CLK_SCU_DVC1
> +                                        R8A7794_CLK_SCU_DVC0
> +                                        R8A7794_CLK_SCU_CTU1_MIX1
> +                                        R8A7794_CLK_SCU_CTU0_MIX0
> +                                        R8A7794_CLK_SCU_SRC9
> +                                        R8A7794_CLK_SCU_SRC8
> +                                        R8A7794_CLK_SCU_SRC7
> +                                        R8A7794_CLK_SCU_SRC6
> +                                        R8A7794_CLK_SCU_SRC5
> +                                        R8A7794_CLK_SCU_SRC4
> +                                        R8A7794_CLK_SCU_SRC3
> +                                        R8A7794_CLK_SCU_SRC2
> +                                        R8A7794_CLK_SCU_SRC1
> +                                        R8A7794_CLK_SCU_SRC0>;
> +                       clock-output-names = "ssi-all", "ssi9", "ssi8", "ssi7",
> +                                            "ssi6", "ssi5", "ssi4", "ssi3",
> +                                            "ssi2", "ssi1", "ssi0",
> +                                            "scu-all", "scu-dvc1", "scu-dvc0",
> +                                            "scu-ctu1-mix1", "scu-ctu0-mix0",
> +                                            "scu-src9", "scu-src8", "scu-src7",
> +                                            "scu-src6", "scu-src5", "scu-src4",
> +                                            "scu-src3", "scu-src2", "scu-src1",
> +                                            "scu-src0";
> +               };
>                 mstp11_clks: mstp11_clks@e615099c {
>                         compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
>                         reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
> Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
> ===================================================================
> --- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
> +++ renesas/include/dt-bindings/clock/r8a7794-clock.h
> @@ -109,6 +109,34 @@
>  #define R8A7794_CLK_I2C1               30
>  #define R8A7794_CLK_I2C0               31
>
> +/* MSTP10 */
> +#define R8A7794_CLK_SSI_ALL            5
> +#define R8A7794_CLK_SSI9               6
> +#define R8A7794_CLK_SSI8               7
> +#define R8A7794_CLK_SSI7               8
> +#define R8A7794_CLK_SSI6               9
> +#define R8A7794_CLK_SSI5               10
> +#define R8A7794_CLK_SSI4               11
> +#define R8A7794_CLK_SSI3               12
> +#define R8A7794_CLK_SSI2               13
> +#define R8A7794_CLK_SSI1               14
> +#define R8A7794_CLK_SSI0               15
> +#define R8A7794_CLK_SCU_ALL            17
> +#define R8A7794_CLK_SCU_DVC1           18
> +#define R8A7794_CLK_SCU_DVC0           19
> +#define R8A7794_CLK_SCU_CTU1_MIX1      20
> +#define R8A7794_CLK_SCU_CTU0_MIX0      21
> +#define R8A7794_CLK_SCU_SRC9           22
> +#define R8A7794_CLK_SCU_SRC8           23
> +#define R8A7794_CLK_SCU_SRC7           24

R-Car E2 does not have SRC7, SRC8, SRC9, ...

> +#define R8A7794_CLK_SCU_SRC6           25
> +#define R8A7794_CLK_SCU_SRC5           26
> +#define R8A7794_CLK_SCU_SRC4           27
> +#define R8A7794_CLK_SCU_SRC3           28
> +#define R8A7794_CLK_SCU_SRC2           29
> +#define R8A7794_CLK_SCU_SRC1           30
> +#define R8A7794_CLK_SCU_SRC0           31

... and SRC0.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 3/6] ARM: dts: r8a7794: add MSTP10 clocks

[Sergei Shtylyov]

Hello.

On 05/19/2016 07:44 PM, Geert Uytterhoeven wrote:

>> Add MSTP10 clocks to the R8A7794 device tree.
>>
>> This patch is based on the commit ee9141522dcf ("ARM: shmobile: r8a7791:
>> add MSTP10 support on DTSI").
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
[...]
>> Index: renesas/include/dt-bindings/clock/r8a7794-clock.h
>> ===================================================================
>> --- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
>> +++ renesas/include/dt-bindings/clock/r8a7794-clock.h
>> @@ -109,6 +109,34 @@
>>  #define R8A7794_CLK_I2C1               30
>>  #define R8A7794_CLK_I2C0               31
>>
>> +/* MSTP10 */
>> +#define R8A7794_CLK_SSI_ALL            5
>> +#define R8A7794_CLK_SSI9               6
>> +#define R8A7794_CLK_SSI8               7
>> +#define R8A7794_CLK_SSI7               8
>> +#define R8A7794_CLK_SSI6               9
>> +#define R8A7794_CLK_SSI5               10
>> +#define R8A7794_CLK_SSI4               11
>> +#define R8A7794_CLK_SSI3               12
>> +#define R8A7794_CLK_SSI2               13
>> +#define R8A7794_CLK_SSI1               14
>> +#define R8A7794_CLK_SSI0               15
>> +#define R8A7794_CLK_SCU_ALL            17
>> +#define R8A7794_CLK_SCU_DVC1           18
>> +#define R8A7794_CLK_SCU_DVC0           19
>> +#define R8A7794_CLK_SCU_CTU1_MIX1      20
>> +#define R8A7794_CLK_SCU_CTU0_MIX0      21
>> +#define R8A7794_CLK_SCU_SRC9           22
>> +#define R8A7794_CLK_SCU_SRC8           23
>> +#define R8A7794_CLK_SCU_SRC7           24
>
> R-Car E2 does not have SRC7, SRC8, SRC9, ...
>
>> +#define R8A7794_CLK_SCU_SRC6           25
>> +#define R8A7794_CLK_SCU_SRC5           26
>> +#define R8A7794_CLK_SCU_SRC4           27
>> +#define R8A7794_CLK_SCU_SRC3           28
>> +#define R8A7794_CLK_SCU_SRC2           29
>> +#define R8A7794_CLK_SCU_SRC1           30
>> +#define R8A7794_CLK_SCU_SRC0           31
>
> ... and SRC0.

    Yet table 7A.12 in the rev1.02 manual lists them all. Your manual doesn't?

MBR, Sergei

Re: [PATCH v3 3/6] ARM: dts: r8a7794: add MSTP10 clocks

[Geert Uytterhoeven]

On Thu, May 19, 2016 at 7:37 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
>>> --- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
>>> +++ renesas/include/dt-bindings/clock/r8a7794-clock.h
>>> @@ -109,6 +109,34 @@
>>>  #define R8A7794_CLK_I2C1               30
>>>  #define R8A7794_CLK_I2C0               31
>>>
>>> +/* MSTP10 */
>>> +#define R8A7794_CLK_SSI_ALL            5
>>> +#define R8A7794_CLK_SSI9               6
>>> +#define R8A7794_CLK_SSI8               7
>>> +#define R8A7794_CLK_SSI7               8
>>> +#define R8A7794_CLK_SSI6               9
>>> +#define R8A7794_CLK_SSI5               10
>>> +#define R8A7794_CLK_SSI4               11
>>> +#define R8A7794_CLK_SSI3               12
>>> +#define R8A7794_CLK_SSI2               13
>>> +#define R8A7794_CLK_SSI1               14
>>> +#define R8A7794_CLK_SSI0               15
>>> +#define R8A7794_CLK_SCU_ALL            17
>>> +#define R8A7794_CLK_SCU_DVC1           18
>>> +#define R8A7794_CLK_SCU_DVC0           19
>>> +#define R8A7794_CLK_SCU_CTU1_MIX1      20
>>> +#define R8A7794_CLK_SCU_CTU0_MIX0      21
>>> +#define R8A7794_CLK_SCU_SRC9           22
>>> +#define R8A7794_CLK_SCU_SRC8           23
>>> +#define R8A7794_CLK_SCU_SRC7           24
>>
>>
>> R-Car E2 does not have SRC7, SRC8, SRC9, ...
>>
>>> +#define R8A7794_CLK_SCU_SRC6           25
>>> +#define R8A7794_CLK_SCU_SRC5           26
>>> +#define R8A7794_CLK_SCU_SRC4           27
>>> +#define R8A7794_CLK_SCU_SRC3           28
>>> +#define R8A7794_CLK_SCU_SRC2           29
>>> +#define R8A7794_CLK_SCU_SRC1           30
>>> +#define R8A7794_CLK_SCU_SRC0           31
>>
>>
>> ... and SRC0.
>
>
>    Yet table 7A.12 in the rev1.02 manual lists them all. Your manual
> doesn't?

I thought you were aware of this, cfr. your "[PATCH] rcar: src: skip
disabled-SRC nodes"?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 3/6] ARM: dts: r8a7794: add MSTP10 clocks

[Sergei Shtylyov]

Hello.

On 05/19/2016 08:41 PM, Geert Uytterhoeven wrote:

>>>> --- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
>>>> +++ renesas/include/dt-bindings/clock/r8a7794-clock.h
>>>> @@ -109,6 +109,34 @@
>>>>  #define R8A7794_CLK_I2C1               30
>>>>  #define R8A7794_CLK_I2C0               31
>>>>
>>>> +/* MSTP10 */
>>>> +#define R8A7794_CLK_SSI_ALL            5
>>>> +#define R8A7794_CLK_SSI9               6
>>>> +#define R8A7794_CLK_SSI8               7
>>>> +#define R8A7794_CLK_SSI7               8
>>>> +#define R8A7794_CLK_SSI6               9
>>>> +#define R8A7794_CLK_SSI5               10
>>>> +#define R8A7794_CLK_SSI4               11
>>>> +#define R8A7794_CLK_SSI3               12
>>>> +#define R8A7794_CLK_SSI2               13
>>>> +#define R8A7794_CLK_SSI1               14
>>>> +#define R8A7794_CLK_SSI0               15
>>>> +#define R8A7794_CLK_SCU_ALL            17
>>>> +#define R8A7794_CLK_SCU_DVC1           18
>>>> +#define R8A7794_CLK_SCU_DVC0           19
>>>> +#define R8A7794_CLK_SCU_CTU1_MIX1      20
>>>> +#define R8A7794_CLK_SCU_CTU0_MIX0      21
>>>> +#define R8A7794_CLK_SCU_SRC9           22
>>>> +#define R8A7794_CLK_SCU_SRC8           23
>>>> +#define R8A7794_CLK_SCU_SRC7           24
>>>
>>>
>>> R-Car E2 does not have SRC7, SRC8, SRC9, ...
>>>
>>>> +#define R8A7794_CLK_SCU_SRC6           25
>>>> +#define R8A7794_CLK_SCU_SRC5           26
>>>> +#define R8A7794_CLK_SCU_SRC4           27
>>>> +#define R8A7794_CLK_SCU_SRC3           28
>>>> +#define R8A7794_CLK_SCU_SRC2           29
>>>> +#define R8A7794_CLK_SCU_SRC1           30
>>>> +#define R8A7794_CLK_SCU_SRC0           31
>>>
>>>
>>> ... and SRC0.
>>
>>
>>    Yet table 7A.12 in the rev1.02 manual lists them all. Your manual
>> doesn't?
>
> I thought you were aware of this, cfr. your "[PATCH] rcar: src: skip
> disabled-SRC nodes"?

    I am, I was just pointing out that this patch was backed by the manual I 
had...

> Gr{oetje,eeting}s,
>
>                         Geert

MBR, Sergei

Re: [PATCH v3 3/6] ARM: dts: r8a7794: add MSTP10 clocks

[Simon Horman]

On Thu, May 19, 2016 at 09:36:27PM +0300, Sergei Shtylyov wrote:
> Hello.
> 
> On 05/19/2016 08:41 PM, Geert Uytterhoeven wrote:
> 
> >>>>--- renesas.orig/include/dt-bindings/clock/r8a7794-clock.h
> >>>>+++ renesas/include/dt-bindings/clock/r8a7794-clock.h
> >>>>@@ -109,6 +109,34 @@
> >>>> #define R8A7794_CLK_I2C1               30
> >>>> #define R8A7794_CLK_I2C0               31
> >>>>
> >>>>+/* MSTP10 */
> >>>>+#define R8A7794_CLK_SSI_ALL            5
> >>>>+#define R8A7794_CLK_SSI9               6
> >>>>+#define R8A7794_CLK_SSI8               7
> >>>>+#define R8A7794_CLK_SSI7               8
> >>>>+#define R8A7794_CLK_SSI6               9
> >>>>+#define R8A7794_CLK_SSI5               10
> >>>>+#define R8A7794_CLK_SSI4               11
> >>>>+#define R8A7794_CLK_SSI3               12
> >>>>+#define R8A7794_CLK_SSI2               13
> >>>>+#define R8A7794_CLK_SSI1               14
> >>>>+#define R8A7794_CLK_SSI0               15
> >>>>+#define R8A7794_CLK_SCU_ALL            17
> >>>>+#define R8A7794_CLK_SCU_DVC1           18
> >>>>+#define R8A7794_CLK_SCU_DVC0           19
> >>>>+#define R8A7794_CLK_SCU_CTU1_MIX1      20
> >>>>+#define R8A7794_CLK_SCU_CTU0_MIX0      21
> >>>>+#define R8A7794_CLK_SCU_SRC9           22
> >>>>+#define R8A7794_CLK_SCU_SRC8           23
> >>>>+#define R8A7794_CLK_SCU_SRC7           24
> >>>
> >>>
> >>>R-Car E2 does not have SRC7, SRC8, SRC9, ...
> >>>
> >>>>+#define R8A7794_CLK_SCU_SRC6           25
> >>>>+#define R8A7794_CLK_SCU_SRC5           26
> >>>>+#define R8A7794_CLK_SCU_SRC4           27
> >>>>+#define R8A7794_CLK_SCU_SRC3           28
> >>>>+#define R8A7794_CLK_SCU_SRC2           29
> >>>>+#define R8A7794_CLK_SCU_SRC1           30
> >>>>+#define R8A7794_CLK_SCU_SRC0           31
> >>>
> >>>
> >>>... and SRC0.
> >>
> >>
> >>   Yet table 7A.12 in the rev1.02 manual lists them all. Your manual
> >>doesn't?
> >
> >I thought you were aware of this, cfr. your "[PATCH] rcar: src: skip
> >disabled-SRC nodes"?
> 
>    I am, I was just pointing out that this patch was backed by the manual I
> had...

It looks like the manual is incorrect in this regard.
Please update the patch as Geert suggests.

> >Gr{oetje,eeting}s,
> >
> >                        Geert
> 
> MBR, Sergei
> 

[PATCH v3 4/6] ARM: dts: r8a7794: add Audio-DMAC support

[Sergei Shtylyov]

Describe Audio-DMAC in the R8A7794 device tree.

This patch is loosely based on the commit 8994fff67761 ("ARM: shmobile:
r8a7791: Add Audio DMAC devices to DT").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>

---
Changes in version 3:
- refreshed the patch.

 arch/arm/boot/dts/r8a7794.dtsi |   28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -295,6 +295,34 @@
 		dma-channels = <15>;
 	};
 
+	audma0: dma-controller@ec700000 {
+		compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
+		reg = <0 0xec700000 0 0x10000>;
+		interrupts =	<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+				 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "error",
+				  "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
+				  "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
+				  "ch12";
+		clocks = <&mstp5_clks R8A7794_CLK_AUDIO_DMAC0>;
+		clock-names = "fck";
+		power-domains = <&cpg_clocks>;
+		#dma-cells = <1>;
+		dma-channels = <13>;
+	};
+
 	scifa0: serial@e6c40000 {
 		compatible = "renesas,scifa-r8a7794",
 			     "renesas,rcar-gen2-scifa", "renesas,scifa";


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Re: [PATCH v3 4/6] ARM: dts: r8a7794: add Audio-DMAC support

[Geert Uytterhoeven]

Hi Sergei,

On Thu, May 12, 2016 at 10:47 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> @@ -295,6 +295,34 @@
>                 dma-channels = <15>;
>         };
>
> +       audma0: dma-controller@ec700000 {
> +               compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
> +               reg = <0 0xec700000 0 0x10000>;
> +               interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> +                                GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
> +               interrupt-names = "error",
> +                                 "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
> +                                 "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
> +                                 "ch12";
> +               clocks = <&mstp5_clks R8A7794_CLK_AUDIO_DMAC0>;
> +               clock-names = "fck";
> +               power-domains = <&cpg_clocks>;

In renesas-devel-20160509-v4.6-rc7, that should be

        power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v3 6/6] ARM: dts: silk: add sound support

[Sergei Shtylyov]

Define the SILK board dependent part of the R8A7794 sound  device node.
Add device node for Asahi Kasei AK4643 stereo codec to the I2C1 bus.
Add the "simple-audio-card" device node to interconnect the SoC sound
device  and the codec.

This patch is based on the commit 493b4da7c10c ("ARM: dts: porter: add
sound support").

Signed-off-by: Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>

---
This patch is against  the 'renesas-devel-20160509-v4.6-rc7' tag of Simon
Horman's 'renesas.git' repo. It depends on the 5 R8A7794 sound support patches
posted earlier in order to build...

Changes in version 3:
- new patch in this series;
- renamed the X9 clock node, getting rid of the "clock-output-names" property;
- removed the "renesas," prefix from the pin properties;
- refreshed the patch.

 arch/arm/boot/dts/r8a7794-silk.dts |   70 +++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts
+++ renesas/arch/arm/boot/dts/r8a7794-silk.dts
@@ -10,6 +10,17 @@
  * kind, whether express or implied.
  */
 
+/*
+ * SSI-AK4643
+ *
+ * SW1: 2-1: AK4643
+ *      2-3: ADV7511
+ *
+ * This command is required before playback/capture:
+ *
+ *	amixer set "LINEOUT Mixer DACL" on
+ */
+
 /dts-v1/;
 #include "r8a7794.dtsi"
 #include <dt-bindings/gpio/gpio.h>
@@ -119,6 +130,29 @@
 		#clock-cells = <0>;
 		clock-frequency = <74250000>;
 	};
+
+	x9_clk: audio_clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <12288000>;
+	};
+
+	sound {
+		compatible = "simple-audio-card";
+
+		simple-audio-card,format = "left_j";
+		simple-audio-card,bitclock-master = <&soundcodec>;
+		simple-audio-card,frame-master = <&soundcodec>;
+
+		simple-audio-card,cpu {
+			sound-dai = <&rcar_sound>;
+		};
+
+		soundcodec: simple-audio-card,codec {
+			sound-dai = <&ak4643>;
+			clocks = <&x9_clk>;
+		};
+	};
 };
 
 &extal_clk {
@@ -193,6 +227,16 @@
 		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
 		function = "du1";
 	};
+
+	ssi_pins: sound {
+		groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+		function = "ssi";
+	};
+
+	audio_clk_pins: audio_clk {
+		groups = "audio_clkc";
+		function = "audio_clk";
+	};
 };
 
 &scif2 {
@@ -230,6 +274,12 @@
 	status = "okay";
 	clock-frequency = <400000>;
 
+	ak4643: codec@12 {
+		compatible = "asahi-kasei,ak4643";
+		#sound-dai-cells = <0>;
+		reg = <0x12>;
+	};
+
 	composite-in@20 {
 		compatible = "adi,adv7180";
 		reg = <0x20>;
@@ -392,3 +442,23 @@
 		};
 	};
 };
+
+&rcar_sound {
+	pinctrl-0 = <&ssi_pins &audio_clk_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	/* Single DAI */
+	#sound-dai-cells = <0>;
+
+	rcar_sound,dai {
+		dai0 {
+			playback = <&ssi0>;
+			capture  = <&ssi1>;
+		};
+	};
+};
+
+&ssi1 {
+	shared-pin;
+};

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Re: [PATCH v3 0/6] Add R8A7794/SILK sound DT support

[Sergei Shtylyov]

Hello.

On 05/12/2016 11:38 PM, Sergei Shtylyov wrote:

>    Here's the set of 6 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20160509-v4.6-rc7' tag. I'm adding the sound device tree support
> for the R8A7794 SoC based SILK board.
>
> [1/6] ARM: dts: r8a7794: add audio clocks
> [2/6] ARM: dts: r8a7794: add MSTP5 clocks
> [3/6] ARM: dts: r8a7794: add MSTP10 clocks
> [4/6] ARM: dts: r8a7794: add Audio-DMAC support
> [5/6] ARM: dts: r8a7794: add sound support
> [6/6] ARM: dts: silk: add sound support

    Oops, forgot to mention that patch #5 depends on the R-Car sound patch 
posted yesterday in order to get interpreted as intended (it uses a disabled 
SRC node).

WBR, Sergei

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Re: [PATCH v3 0/6] Add R8A7794/SILK sound DT support

[Sergei Shtylyov]

Hello.

On 05/13/2016 12:16 AM, Sergei Shtylyov wrote:

>>    Here's the set of 6 patches against Simon Horman's 'renesas.git' repo,
>> 'renesas-devel-20160509-v4.6-rc7' tag. I'm adding the sound device tree support
>> for the R8A7794 SoC based SILK board.
>>
>> [1/6] ARM: dts: r8a7794: add audio clocks
>> [2/6] ARM: dts: r8a7794: add MSTP5 clocks
>> [3/6] ARM: dts: r8a7794: add MSTP10 clocks
>> [4/6] ARM: dts: r8a7794: add Audio-DMAC support
>> [5/6] ARM: dts: r8a7794: add sound support
>> [6/6] ARM: dts: silk: add sound support
>
>    Oops, forgot to mention that patch #5 depends on the R-Car sound patch
> posted yesterday in order to get interpreted as intended (it uses a disabled
> SRC node).

   Simon, that patch has already hit Linus' tree but this series seems to be 
stuck. Please merge!

WBR, Sergei

Re: [PATCH v3 0/6] Add R8A7794/SILK sound DT support

[Simon Horman]

On Mon, Jun 06, 2016 at 09:11:17PM +0300, Sergei Shtylyov wrote:
> Hello.
> 
> On 05/13/2016 12:16 AM, Sergei Shtylyov wrote:
> 
> >>   Here's the set of 6 patches against Simon Horman's 'renesas.git' repo,
> >>'renesas-devel-20160509-v4.6-rc7' tag. I'm adding the sound device tree support
> >>for the R8A7794 SoC based SILK board.
> >>
> >>[1/6] ARM: dts: r8a7794: add audio clocks
> >>[2/6] ARM: dts: r8a7794: add MSTP5 clocks
> >>[3/6] ARM: dts: r8a7794: add MSTP10 clocks
> >>[4/6] ARM: dts: r8a7794: add Audio-DMAC support
> >>[5/6] ARM: dts: r8a7794: add sound support
> >>[6/6] ARM: dts: silk: add sound support
> >
> >   Oops, forgot to mention that patch #5 depends on the R-Car sound patch
> >posted yesterday in order to get interpreted as intended (it uses a disabled
> >SRC node).
> 
>   Simon, that patch has already hit Linus' tree but this series seems to be
> stuck. Please merge!

Hi Sergei,

there seem to be some outstanding review comments for v3 of this patchset.
Could you address them and repost?

Thanks!
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Re: [PATCH v3 0/6] Add R8A7794/SILK sound DT support

[Sergei Shtylyov]

Hello.

On 6/7/2016 3:37 AM, Simon Horman wrote:

>>>>   Here's the set of 6 patches against Simon Horman's 'renesas.git' repo,
>>>> 'renesas-devel-20160509-v4.6-rc7' tag. I'm adding the sound device tree support
>>>> for the R8A7794 SoC based SILK board.
>>>>
>>>> [1/6] ARM: dts: r8a7794: add audio clocks
>>>> [2/6] ARM: dts: r8a7794: add MSTP5 clocks
>>>> [3/6] ARM: dts: r8a7794: add MSTP10 clocks
>>>> [4/6] ARM: dts: r8a7794: add Audio-DMAC support
>>>> [5/6] ARM: dts: r8a7794: add sound support
>>>> [6/6] ARM: dts: silk: add sound support
>>>
>>>   Oops, forgot to mention that patch #5 depends on the R-Car sound patch
>>> posted yesterday in order to get interpreted as intended (it uses a disabled
>>> SRC node).
>>
>>   Simon, that patch has already hit Linus' tree but this series seems to be
>> stuck. Please merge!
>
> Hi Sergei,
>
> there seem to be some outstanding review comments for v3 of this patchset.

    Indeed, seeing them now. Sorry for bothering you...

> Could you address them and repost?

    I will. :-)

> Thanks!

MBR, Sergei

[PATCH v3 5/6] ARM: dts: r8a7794: add sound support

[Sergei Shtylyov]

Define the generic R8A7794 part of  the sound device node.
This sound device  is a complex one and comprises the Audio Clock Generator
(ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit]
(SSI[U]), and Audio DMAC-Peripheral-Peripheral.
It is up  to the board file to enable the device.

This patch is based on the R8A7791 sound work by Kuninori Morimoto.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
Changes in version 3:
- added back (now disabled) SRC0 node;
- refreshed the patch.

Changes in version 2:
- added "ctu.[01]", "mix.[01]", "dvc.[01]" to the "clock-names" prop;
- added  CTU/DVC/MIX subnodes;
- removed SRC0/7/8/9 subnodes;
- added missing colon to the subject.

 arch/arm/boot/dts/r8a7794.dtsi |  185 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 185 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7794.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
+++ renesas/arch/arm/boot/dts/r8a7794.dtsi
@@ -1385,4 +1385,189 @@
 		#iommu-cells = <1>;
 		status = "disabled";
 	};
+
+	rcar_sound: sound@ec500000 {
+		/*
+		 * #sound-dai-cells is required
+		 *
+		 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
+		 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
+		 */
+		compatible = "renesas,rcar_sound-r8a7794",
+			     "renesas,rcar_sound-gen2";
+		reg =	<0 0xec500000 0 0x1000>, /* SCU */
+			<0 0xec5a0000 0 0x100>,  /* ADG */
+			<0 0xec540000 0 0x1000>, /* SSIU */
+			<0 0xec541000 0 0x280>,  /* SSI */
+			<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
+		reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+		clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
+			 <&mstp10_clks R8A7794_CLK_SSI9>,
+			 <&mstp10_clks R8A7794_CLK_SSI8>,
+			 <&mstp10_clks R8A7794_CLK_SSI7>,
+			 <&mstp10_clks R8A7794_CLK_SSI6>,
+			 <&mstp10_clks R8A7794_CLK_SSI5>,
+			 <&mstp10_clks R8A7794_CLK_SSI4>,
+			 <&mstp10_clks R8A7794_CLK_SSI3>,
+			 <&mstp10_clks R8A7794_CLK_SSI2>,
+			 <&mstp10_clks R8A7794_CLK_SSI1>,
+			 <&mstp10_clks R8A7794_CLK_SSI0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
+			 <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
+			 <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
+			 <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
+			 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+			 <&m2_clk>;
+		clock-names = "ssi-all",
+			      "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
+			      "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
+			      "src.9", "src.8", "src.7", "src.6", "src.5",
+			      "src.4", "src.3", "src.2", "src.1", "src.0",
+			      "ctu.0", "ctu.1",
+			      "mix.0", "mix.1",
+			      "dvc.0", "dvc.1",
+			      "clk_a", "clk_b", "clk_c", "clk_i";
+		power-domains = <&cpg_clocks>;
+
+		status = "disabled";
+
+		rcar_sound,dvc {
+			dvc0: dvc@0 {
+				dmas = <&audma0 0xbc>;
+				dma-names = "tx";
+			};
+			dvc1: dvc@1 {
+				dmas = <&audma0 0xbe>;
+				dma-names = "tx";
+			};
+		};
+
+		rcar_sound,mix {
+			mix0: mix@0 { };
+			mix1: mix@1 { };
+		};
+
+		rcar_sound,ctu {
+			ctu00: ctu@0 { };
+			ctu01: ctu@1 { };
+			ctu02: ctu@2 { };
+			ctu03: ctu@3 { };
+			ctu10: ctu@4 { };
+			ctu11: ctu@5 { };
+			ctu12: ctu@6 { };
+			ctu13: ctu@7 { };
+		};
+
+		rcar_sound,src {
+			src@0 {
+				status = "disabled";
+			};
+			src1: src@1 {
+				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x87>, <&audma0 0x9c>;
+				dma-names = "rx", "tx";
+			};
+			src2: src@2 {
+				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x89>, <&audma0 0x9e>;
+				dma-names = "rx", "tx";
+			};
+			src3: src@3 {
+				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+				dma-names = "rx", "tx";
+			};
+			src4: src@4 {
+				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+				dma-names = "rx", "tx";
+			};
+			src5: src@5 {
+				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+				dma-names = "rx", "tx";
+			};
+			src6: src@6 {
+				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x91>, <&audma0 0xb4>;
+				dma-names = "rx", "tx";
+			};
+		};
+
+		rcar_sound,ssi {
+			ssi0: ssi@0 {
+				interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x01>, <&audma0 0x02>,
+				       <&audma0 0x15>, <&audma0 0x16>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi1: ssi@1 {
+				interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x03>, <&audma0 0x04>,
+				       <&audma0 0x49>, <&audma0 0x4a>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi2: ssi@2 {
+				interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x05>, <&audma0 0x06>,
+				       <&audma0 0x63>, <&audma0 0x64>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi3: ssi@3 {
+				interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x07>, <&audma0 0x08>,
+				       <&audma0 0x6f>, <&audma0 0x70>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi4: ssi@4 {
+				interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x09>, <&audma0 0x0a>,
+				       <&audma0 0x71>, <&audma0 0x72>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi5: ssi@5 {
+				interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+				       <&audma0 0x73>, <&audma0 0x74>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi6: ssi@6 {
+				interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+				       <&audma0 0x75>, <&audma0 0x76>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi7: ssi@7 {
+				interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x0f>, <&audma0 0x10>,
+				       <&audma0 0x79>, <&audma0 0x7a>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi8: ssi@8 {
+				interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x11>, <&audma0 0x12>,
+				       <&audma0 0x7b>, <&audma0 0x7c>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+			ssi9: ssi@9 {
+				interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&audma0 0x13>, <&audma0 0x14>,
+				       <&audma0 0x7d>, <&audma0 0x7e>;
+				dma-names = "rx", "tx", "rxu", "txu";
+			};
+		};
+	};
 };

Re: [PATCH v3 5/6] ARM: dts: r8a7794: add sound support

[Geert Uytterhoeven]

On Thu, May 12, 2016 at 10:49 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> --- renesas.orig/arch/arm/boot/dts/r8a7794.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7794.dtsi
> @@ -1385,4 +1385,189 @@
>                 #iommu-cells = <1>;
>                 status = "disabled";
>         };
> +
> +       rcar_sound: sound@ec500000 {
> +               /*
> +                * #sound-dai-cells is required
> +                *
> +                * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
> +                * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
> +                */
> +               compatible = "renesas,rcar_sound-r8a7794",
> +                            "renesas,rcar_sound-gen2";
> +               reg =   <0 0xec500000 0 0x1000>, /* SCU */
> +                       <0 0xec5a0000 0 0x100>,  /* ADG */
> +                       <0 0xec540000 0 0x1000>, /* SSIU */
> +                       <0 0xec541000 0 0x280>,  /* SSI */
> +                       <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
> +               reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> +
> +               clocks = <&mstp10_clks R8A7794_CLK_SSI_ALL>,
> +                        <&mstp10_clks R8A7794_CLK_SSI9>,
> +                        <&mstp10_clks R8A7794_CLK_SSI8>,
> +                        <&mstp10_clks R8A7794_CLK_SSI7>,
> +                        <&mstp10_clks R8A7794_CLK_SSI6>,
> +                        <&mstp10_clks R8A7794_CLK_SSI5>,
> +                        <&mstp10_clks R8A7794_CLK_SSI4>,
> +                        <&mstp10_clks R8A7794_CLK_SSI3>,
> +                        <&mstp10_clks R8A7794_CLK_SSI2>,
> +                        <&mstp10_clks R8A7794_CLK_SSI1>,
> +                        <&mstp10_clks R8A7794_CLK_SSI0>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC9>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC8>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC7>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC6>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC5>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC4>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC3>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC2>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC1>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_SRC0>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_CTU0_MIX0>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_CTU1_MIX1>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_DVC0>,
> +                        <&mstp10_clks R8A7794_CLK_SCU_DVC1>,
> +                        <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
> +                        <&m2_clk>;
> +               clock-names = "ssi-all",
> +                             "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
> +                             "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
> +                             "src.9", "src.8", "src.7", "src.6", "src.5",
> +                             "src.4", "src.3", "src.2", "src.1", "src.0",
> +                             "ctu.0", "ctu.1",
> +                             "mix.0", "mix.1",
> +                             "dvc.0", "dvc.1",
> +                             "clk_a", "clk_b", "clk_c", "clk_i";
> +               power-domains = <&cpg_clocks>;

In renesas-devel-20160509-v4.6-rc7, that should be

        power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds