Re: [PATCH 4/5] arm64: dts: imx95: add PCIe's msi-map and iommu-map property

[Alexander Stein <alexander.stein@ew.tq-group.com>]

Hi,

Am Freitag, 11. April 2025, 16:42:29 CEST schrieb Frank Li:
> On Fri, Apr 11, 2025 at 08:53:02AM +0200, Alexander Stein wrote:
> > Hi,
> >
> > Am Mittwoch, 9. April 2025, 16:59:21 CEST schrieb Frank Li:
> > > On Wed, Apr 09, 2025 at 12:14:48PM +0200, Alexander Stein wrote:
> > > > Hi Frank,
> > > >
> > > > Am Donnerstag, 27. März 2025, 19:48:33 CEST schrieb Frank Li:
> > > > > [snip]
> > > > > Finially we get realtek PCI card
> > > > >
> > > > > it quite complex, there are one PCIe switch to split it to two pci bus.
> > > > >
> > > > >  lspci -t
> > > > > -[0000:00]---00.0-[01-ff]----00.0-[02-04]--+-03.0-[03]----00.0
> > > > >                                            \-07.0-[04]----00.0
> > > >
> > > > Interesting. Mine looks slightly different:
> > > >
> > > > $ lspci -t
> > > > -[0000:00]---00.0-[01-ff]----00.0-[02-04]--+-01.0-[03]----00.0
> > > >                                            \-02.0-[04]----00.0
> > > >
> > > > >
> > > > >
> > > > > 0000:00:00.0 PCI bridge: Philips Semiconductors Device 0000
> > > > > 0000:01:00.0 PCI bridge: ASMedia Technology Inc. ASM1182e 2-Port PCIe x1 Gen2 Packet Switch
> > > > > 0000:02:03.0 PCI bridge: ASMedia Technology Inc. ASM1182e 2-Port PCIe x1 Gen2 Packet Switch
> > > > > 0000:02:07.0 PCI bridge: ASMedia Technology Inc. ASM1182e 2-Port PCIe x1 Gen2 Packet Switch
> > > >
> > > > It seems you have a newer hardware revision. I have
> > > > 0000:01:00.0 PCI bridge: Pericom Semiconductor Device a303 (rev 03)
> > > > 0000:02:01.0 PCI bridge: Pericom Semiconductor Device a303 (rev 03)
> > > > 0000:02:02.0 PCI bridge: Pericom Semiconductor Device a303 (rev 03)
> > > >
> > > > PCIe bridges.
> > > >
> > > > > 0000:03:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8211/8411 PCI Express Gigabit Ethernet Controller (rev 09)
> > > > > 0000:04:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8211/8411 PCI Express Gigabit Ethernet Controller (rev 09)
> > > > >
> > > > > It need below change
> > > > >
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > > > > index 9bb26b466a061..9dbf395b9a67b 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > > > > @@ -1660,10 +1660,18 @@ pcie0: pcie@4c300000 {
> > > > >                         power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> > > > >                         /* pcie0's Devid(BIT[7:6]) is 0x00, stream id(BIT[5:0]) is 0x10~0x17 */
> > > > >                         msi-map = <0x0 &its 0x10 0x1>,
> > > > > -                                 <0x100 &its 0x11 0x7>;
> > > > > +                                 <0x100 &its 0x11 0x1>,
> > > > > +                                 <0x218 &its 0x12 0x1>,
> > > > > +                                 <0x238 &its 0x13 0x1>,
> > > > > +                                 <0x300 &its 0x14 0x1>,
> > > > > +                                 <0x400 &its 0x15 0x1>;
> > > > >                         iommu-map = <0x000 &smmu 0x10 0x1>,
> > > > > -                                   <0x100 &smmu 0x11 0x7>;
> > > > > -                       iommu-map-mask = <0x1ff>;
> > > > > +                                   <0x100 &smmu 0x11 0x1>,
> > > > > +                                   <0x218 &smmu 0x12 0x1>,
> > > > > +                                   <0x238 &smmu 0x13 0x1>,
> > > > > +                                   <0x300 &smmu 0x14 0x1>,
> > > > > +                                   <0x400 &smmu 0x15 0x1>;
> > > > > +                       //iommu-map-mask = <0x1ff>;
> > > > >                         fsl,max-link-speed = <3>;
> > > > >                         status = "disabled";
> > > > >
> > > > >
> > > > > Only 8 stream id assign to PCIe0 device, it is hard to dynamaic alloce one,
> > > > > or need extra works
> > > >
> > > > Uh, this looks awefully complicated. Even worse this doesn't work on
> > > > my hardware. I need mappings for IDs 0x208 and 0x210, so I replaced 0x218
> > > > and 0x238 from your diff into my numbers.
> > > >
> > > > So I take that PCIe bridges are not supported properly. What would be
> > > > necessary to support this?
> > >
> > > I remember bridge use msi to do port power managements.
> > >
> > > ITS msi-map can distribute difference irq to difference cores beside iommu
> > > address protection. It is quite userful for nvme or network devices, which
> > > have multi queues. Of course, we need more elegant solution.
> > >
> > > My card use difference pcie switch chip. But suppose it should work after
> > > you update RID information.
> >
> > Yep, after adjusting RID mapping, it works here.
> 
> Are you sure it work after adjusting RID mapping? you said
> "I take that PCIe bridges are not supported properly"
> 
> So I am confused. If it works, I can think how to allocate a stream elegant.

Sorry, this sounded misleading. I was referring to the current state.
Without additional adjustments PCIe bridges might not work, AFAIU.
If I adjust the RID mapping, the Ethernet hardware having 2 bridges works on
my platforms.

Best regards
Alexander
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