Re: [PATCH 2/9] reset: simple: Add support for Freescale i.MX95 GPU reset

Marek Vasut
2025-02-28T18:27:11Z

On 2/28/25 10:58 AM, Alexander Stein wrote:

Hi,

>> drivers/reset/reset-simple.c | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
>> index 2760678398308..1415a941fd6eb 100644
>> --- a/drivers/reset/reset-simple.c
>> +++ b/drivers/reset/reset-simple.c
>> @@ -133,9 +133,17 @@ static const struct reset_simple_devdata reset_simple_active_low = {
>> .status_active_low = true,
>> };
>>
>> +static const struct reset_simple_devdata reset_simple_fsl_imx95_gpu_blk_ctrl = {
>> + .reg_offset = 0x8,
>
> Shouldn't you add ".nr_resets = 1"? Otherwise this will have 8 resets
> (resource_size(res) * BITS_PER_BYTE).

I should, thanks.

> On a side note: RM says this is a write-once register. Do we consider writing
> this register again?
> BTW: Would it be possible to disable it completely (until reset) by writing 1?
My observation is that this register is set and cannot be cleared by
writing 0 into it, if I write 0 into this register and read it back, it
stays at 1 .

Maybe NXP can clarify whether modelling this as reset-simple is really a
good idea or whether it would be better to rewrite this as custom reset
driver ? …