Re: [PATCH 6/9] drm/panthor: Reset GPU after L2 cache power off

Marek Vasut
2025-02-28T18:27:14Z

On 2/28/25 12:06 PM, Liviu Dudau wrote:
> Hi Marek,

Hi,

> On Thu, Feb 27, 2025 at 05:58:06PM +0100, Marek Vasut wrote:
>> This seems necessary on Freescale i.MX95 Mali G310 to reliably resume
>> from runtime PM suspend. Without this, if only the L2 is powered down
>> on RPM entry, the GPU gets stuck and does not indicate the firmware is
>> booted after RPM resume.
>
> That doesn't sound right. Can you tell me what GPU firmware are you running
> (we are now printing the git sha of the image at boot time).
Please see below. It could be some sort of NXP firmware fork ?

It comes from the NXP firmware repo , mali-imx-r50.2-710cfb6 .

panthor 4d900000.gpu: [drm] clock rate = 1000000000
panthor 4d900000.gpu: EM: created perf domain
panthor 4d900000.gpu: [drm] mali-unknown id 0xac74 major 0x0 minor 0x0
status 0x1
panthor 4d900000.gpu: [drm] Features: L2:0x7110306 Tiler:0x809 Mem:0x1
MMU:0x2830 AS:0xff
panthor 4d900000.gpu: [drm] shader_present=0x1 l2_present=0x1
tiler_present=0x1
panthor 4d900000.gpu: [drm] Firmware protected mode entry not be
supported, ignoring
panthor 4d900000.gpu: [drm] Firmware git sha:
8e5cfcfec20cc8aff8509d37e72babc935d34a3b
panthor 4d900000.gpu: [drm] CSF FW using interface v1.1.0, Features 0x0
Instrumentation features 0x71
[drm] Initialized panthor 1.3.0 for 4d900000.gpu on minor 0

$ sha256sum mali_csffw.bin
befd23b9279b26010ebf35c835cc3aa7d0f50758930c7306ff4f5abbe5218624
mali_csffw.bin …